| 2008 |
| 39 | EE | Love Singhal,
Sejong Oh,
Eli Bozorgzadeh:
Statistical power profile correlation for realistic thermal estimation.
ASP-DAC 2008: 67-70 |
| 38 | EE | Sejong Oh,
Tag Gon Kim,
Jeonghun Cho,
Elaheh Bozorgzadeh:
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 409-422 (2008) |
| 2007 |
| 37 | EE | S. Golshan,
Elaheh Bozorgzadeh:
Single-Event-Upset (SEU) Awareness in FPGA Routing.
DAC 2007: 330-333 |
| 36 | EE | Sudarshan Banerjee,
Elaheh Bozorgzadeh,
Nikil Dutt,
Juanjo Noguera:
Selective Band width and Resource Management in Scheduling for Dynamically Reconfigurable Architectures.
DAC 2007: 771-776 |
| 35 | EE | Love Singhal,
Elaheh Bozorgzadeh,
David Eppstein:
Interconnect Criticality-Driven Delay Relaxation.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1803-1817 (2007) |
| 2006 |
| 34 | EE | Sudarshan Banerjee,
Elaheh Bozorgzadeh,
Nikil Dutt:
PARLGRAN: parallelism granularity selection for scheduling task chains on dynamically reconfigurable architectures.
ASP-DAC 2006: 491-496 |
| 33 | EE | S. Dai,
Elaheh Bozorgzadeh:
CAD Tool for FPGAs with Embedded Hard Cores for Design Space Exploration of Future Architectures.
FCCM 2006: 329-330 |
| 32 | EE | Love Singhal,
Elaheh Bozorgzadeh:
Multi-layer Floorplanning on a Sequence of Reconfigurable Designs.
FPL 2006: 1-8 |
| 31 | EE | Love Singhal,
Elaheh Bozorgzadeh:
Physically-aware exploitation of component reuse in a partially reconfigurable architecture.
IPDPS 2006 |
| 30 | EE | Sudarshan Banerjee,
Elaheh Bozorgzadeh,
Nikil D. Dutt:
Integrating Physical Constraints in HW-SW Partitioning for Architectures With Partial Dynamic Reconfiguration.
IEEE Trans. VLSI Syst. 14(11): 1189-1202 (2006) |
| 29 | EE | Sudeep Pasricha,
Nikil D. Dutt,
Elaheh Bozorgzadeh,
Mohamed Ben-Romdhane:
FABSYN: floorplan-aware bus architecture synthesis.
IEEE Trans. VLSI Syst. 14(3): 241-253 (2006) |
| 28 | EE | Gang Wang,
Satish Sivaswamy,
Cristinel Ababei,
Kia Bazargan,
Ryan Kastner,
Elaheh Bozorgzadeh:
Statistical Analysis and Design of HARP FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2088-2102 (2006) |
| 27 | EE | Soheil Ghiasi,
Elaheh Bozorgzadeh,
Po-Kuan Huang,
Roozbeh Jafari,
Majid Sarrafzadeh:
A Unified Theory of Timing Budget Management.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2364-2375 (2006) |
| 26 | EE | Soheil Ghiasi,
Elaheh Bozorgzadeh,
Karlene Nguyen,
Majid Sarrafzadeh:
Efficient Timing Budget Management for Accuracy Improvement in a Collaborative Object Tracking System.
VLSI Signal Processing 42(1): 43-55 (2006) |
| 2005 |
| 25 | EE | Sudarshan Banerjee,
Elaheh Bozorgzadeh,
Nikil D. Dutt:
Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration.
DAC 2005: 335-340 |
| 24 | EE | Sudeep Pasricha,
Nikil D. Dutt,
Elaheh Bozorgzadeh,
Mohamed Ben-Romdhane:
Floorplan-aware automated synthesis of bus-based communication architectures.
DAC 2005: 565-570 |
| 23 | EE | Sudarshan Banerjee,
Elaheh Bozorgzadeh,
Nikil D. Dutt:
Considering Run-Time Reconfiguration Overhead in Task Graph Transformations for Dynamically Reconfigurable Architectures.
FCCM 2005: 273-274 |
| 22 | EE | Satish Sivaswamy,
Gang Wang,
Cristinel Ababei,
Kia Bazargan,
Ryan Kastner,
Eli Bozorgzadeh:
HARP: hard-wired routing pattern FPGAs.
FPGA 2005: 21-29 |
| 21 | | Love Singhal,
Elaheh Bozorgzadeh:
Fast timing closure by interconnect criticality driven delay relaxation.
ICCAD 2005: 792-797 |
| 20 | EE | Seda Ogrenci Memik,
Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
A scheduling algorithm for optimization and early planning in high-level synthesis.
ACM Trans. Design Autom. Electr. Syst. 10(1): 33-57 (2005) |
| 2004 |
| 19 | | Elaheh Bozorgzadeh,
Soheil Ghiasi,
Atsushi Takahashi,
Majid Sarrafzadeh:
Incremental Timing Budget Management in Programmable Systems.
ERSA 2004: 240-246 |
| 18 | EE | Soheil Ghiasi,
Elaheh Bozorgzadeh,
Siddharth Choudhuri,
Majid Sarrafzadeh:
A unified theory of timing budget management.
ICCAD 2004: 653-659 |
| 17 | EE | Elaheh Bozorgzadeh,
Soheil Ghiasi,
Atsushi Takahashi,
Majid Sarrafzadeh:
Optimal integer delay-budget assignment on directed acyclic graphs.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1184-1199 (2004) |
| 16 | EE | Elaheh Bozorgzadeh,
Seda Ogrenci Memik,
Xiaojian Yang,
Majid Sarrafzadeh:
Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs.
Journal of Circuits, Systems, and Computers 13(1): 77-100 (2004) |
| 2003 |
| 15 | EE | Elaheh Bozorgzadeh,
Soheil Ghiasi,
Atsushi Takahashi,
Majid Sarrafzadeh:
Optimal integer delay budgeting on directed acyclic graphs.
DAC 2003: 920-925 |
| 14 | EE | Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Customized regular channel design in FPGAs.
FPGA 2003: 240 |
| 13 | EE | Soheil Ghiasi,
Karlene Nguyen,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
On computation and resource management in an FPGA-based computation environment.
FPGA 2003: 243 |
| 12 | EE | Elaheh Bozorgzadeh,
Ryan Kastner,
Majid Sarrafzadeh:
Creating and exploiting flexibility in rectilinear Steiner trees.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 605-615 (2003) |
| 2002 |
| 11 | EE | Ryan Kastner,
Adam Kaplan,
Seda Ogrenci Memik,
Elaheh Bozorgzadeh:
Instruction generation for hybrid reconfigurable systems.
ACM Trans. Design Autom. Electr. Syst. 7(4): 605-627 (2002) |
| 10 | EE | Chunhong Chen,
Elaheh Bozorgzadeh,
Ankur Srivastava,
Majid Sarrafzadeh:
Budget Management with Applications.
Algorithmica 34(3): 261-275 (2002) |
| 9 | EE | Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Pattern routing: use and theory for increasing predictability andavoiding coupling.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(7): 777-790 (2002) |
| 2001 |
| 8 | EE | Elaheh Bozorgzadeh,
Seda Ogrenci Memik,
Majid Sarrafzadeh:
RPack: routability-driven packing for cluster-based FPGAs.
ASP-DAC 2001: 629-634 |
| 7 | EE | Elaheh Bozorgzadeh,
Ryan Kastner,
Majid Sarrafzadeh:
Creating and Exploiting Flexibility in Steiner Trees.
DAC 2001: 195-198 |
| 6 | EE | Ryan Kastner,
Seda Ogrenci Memik,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Instruction Generation for Hybrid Reconfigurable Systems.
ICCAD 2001: 127- |
| 5 | EE | Seda Ogrenci Memik,
Elaheh Bozorgzadeh,
Ryan Kastner,
Majid Sarrafzadeh:
A Super-Scheduler for Embedded Reconfigurable Systems.
ICCAD 2001: 391- |
| 4 | EE | Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
An exact algorithm for coupling-free routing.
ISPD 2001: 10-15 |
| 3 | EE | Majid Sarrafzadeh,
Elaheh Bozorgzadeh,
Ryan Kastner,
Ankur Srivastava:
Design and analysis of physical design algorithms.
ISPD 2001: 82-89 |
| 2 | EE | Xiaojian Yang,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Wirelength estimation based on rent exponents of partitioning and placement.
SLIP 2001: 25-31 |
| 2000 |
| 1 | | Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Predictable Routing.
ICCAD 2000: 110-113 |