| 2007 |
|---|
| 11 | EE | Gang Wang,
Wenrui Gong,
Brian DeRenzi,
Ryan Kastner:
Exploring time/resource trade-offs by solving dual scheduling problems with the ant colony optimization.
ACM Trans. Design Autom. Electr. Syst. 12(4): (2007) |
| 10 | EE | Gang Wang,
Wenrui Gong,
Brian DeRenzi,
Ryan Kastner:
Ant Colony Optimizations for Resource- and Timing-Constrained Operation Scheduling.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1010-1029 (2007) |
| 2006 |
|---|
| 9 | EE | Gang Wang,
Wenrui Gong,
Brian DeRenzi,
Ryan Kastner:
Design space exploration using time and resource duality with the ant colony optimization.
DAC 2006: 451-454 |
| 8 | EE | Ryan Kastner,
Wenrui Gong,
Xin Hao,
Forrest Brewer,
Adam Kaplan,
Philip Brisk,
Majid Sarrafzadeh:
Layout driven data communication optimization for high level synthesis.
DATE 2006: 1185-1190 |
| 7 | EE | Gang Wang,
Wenrui Gong,
Ryan Kastner:
Defect-Tolerant Nanocomputing Using Bloom Filters.
FCCM 2006: 277-278 |
| 6 | EE | Gang Wang,
Wenrui Gong,
Ryan Kastner:
On the use of Bloom filters for defect maps in nanocomputing.
ICCAD 2006: 743-746 |
| 2005 |
|---|
| 5 | EE | Gang Wang,
Wenrui Gong,
Ryan Kastner:
Instruction scheduling using MAX-MIN ant system optimization.
ACM Great Lakes Symposium on VLSI 2005: 44-49 |
| 4 | | Wenrui Gong,
Yan Meng,
Gang Wang,
Ryan Kastner,
Timothy Sherwood:
Data Partitioning and Optimizations for Reconfigurable Architectures.
ERSA 2005: 239-242 |
| 3 | | Wenrui Gong,
Gang Wang,
Ryan Kastner:
Storage assignment during high-level synthesis for configurable architectures.
ICCAD 2005: 3-6 |
| 2 | EE | Yan Meng,
Wenrui Gong,
Ryan Kastner,
Timothy Sherwood:
Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator.
J. Low Power Electronics 1(3): 238-248 (2005) |
| 2004 |
|---|
| 1 | | Wenrui Gong,
Gang Wang,
Ryan Kastner:
A High Performance Application Representation for Reconfigurable Systems.
ERSA 2004: 218-224 |
