DATE 2005:
Munich,
Germany
2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany.
IEEE Computer Society 2005, ISBN 0-7695-2288-2 BibTeX
Volume 1
Keynote Addresses
- Jeong-Taek Kong:
SoC in Nanoera: Challenges and Endless Possibility.
2 BibTeX
- Garry Hughes:
Striking a New Balance in the Nanometer Era: First-Time-Right and Time-to-Market Demands Versus Technology Challenges.
3 BibTeX
1A:
Partitioning and Optimisation for Reconfigurable Computing
Interactive Presentations
1B:
Hot Topic - Analogue/Digital Circuit Design in 65nm:
End of the Road
1C:
SoC Design-for-Test
Interactive Presentation
1E:
Embedded Tutorial - Cross-Pollination between HW and SW - Hard Lessons for Software,
and Vice Versa
1F:
Low Power Design with Error Tolerance
- Diana Marculescu:
Energy Bounds for Fault-Tolerant Nanoscale Designs.
74-79
Electronic Edition (link) BibTeX
- Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor N. Mudge, Todd M. Austin:
DVS for On-Chip Bus Designs Based on Timing Error Correction.
80-85
Electronic Edition (link) BibTeX
- Le Cai, Yung-Hsiang Lu:
Joint Power Management of Memory and Disk.
86-91
Electronic Edition (link) BibTeX
- Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin:
Assertion-Based Design Exploration of DVS in Network Processor Architectures.
92-97
Electronic Edition (link) BibTeX
2A:
Scheduling and Synthesis for Reconfigurable Computin
2B:
Analogue Simulation,
Placement and Statistical Analysis
2C:
Analogue and Gigahertz Test
Interactive Presentations
2E:
Ubiquitous Computing:
Security and Energy Aspects
- Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha:
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring.
178-183
Electronic Edition (link) BibTeX
- Jung-Chun Kao, Radu Marculescu:
Energy-Aware Routing for E-Textile Applications.
184-189
Electronic Edition (link) BibTeX
- Arijit Ghosh, Tony Givargis:
LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks.
190-195
Electronic Edition (link) BibTeX
- Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene:
Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives.
196-201
Electronic Edition (link) BibTeX
Interactive Presentation
2F:
Power Aware Design in DSM Technology
- José Luis Rosselló, V. Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura:
A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs.
206-211
Electronic Edition (link) BibTeX
- Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry:
Activity Packing in FPGAs for Leakage Power Reduction.
212-217
Electronic Edition (link) BibTeX
- Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan:
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures.
218-223
Electronic Edition (link) BibTeX
- Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy:
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits.
224-229
Electronic Edition (link) BibTeX
Interactive Presentation
3A:
Reconfigurability in MPSoC
- Vincent Nollet, Théodore Marescaux, Prabhat Avasare, Jean-Yves Mignolet:
Centralized Run-Time Resource Management in a Network-on-Chip Containing Reconfigurable Hardware Tiles.
234-239
Electronic Edition (link) BibTeX
- Austin Hung, William D. Bishop, Andrew A. Kennings:
Symmetric Multiprocessing on Programmable Chips Made Easy.
240-245
Electronic Edition (link) BibTeX
- Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor:
A Complete Network-On-Chip Emulation Framework.
246-251
Electronic Edition (link) BibTeX
Interactive Presentation
3B:
Analogue,
Mixed-Signal and RF Circuits and Systems
Interactive Presentations
3C:
Reliability at the Very Deep Sub-Micron Region
Interactive Presentations
3F:
HW/SW Solutions for Low Power Multimedia Systems
- Arne Hamann, Rolf Ernst:
TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques.
312-317
Electronic Edition (link) BibTeX
- Jennifer L. Wong, Weiping Liao, Fei Li, Lei He, Miodrag Potkonjak:
Scheduling of Soft Real-Time Systems for Context-Aware Applications.
318-323
Electronic Edition (link) BibTeX
- Fernando Rincón, Francisco Moya, Jesús Barba, Juan Carlos López:
Model Reuse through Hardware Design Patterns.
324-329
Electronic Edition (link) BibTeX
- Amr T. Abdel-Hamid, Sofiène Tahar, El Mostapha Aboulhamid:
A Public-Key Watermarking Technique for IP Designs.
330-335
Electronic Edition (link) BibTeX
Interactive Presentation
3F:
HW/SW Solutions for Low Power Multimedia Systems
4A:
Embedded System Partitioning and Validation
- Benoit Miramond, Jean-Marc Delosme:
Design Space Exploration for Dynamically Reconfigurable Architectures.
366-371
Electronic Edition (link) BibTeX
- Arshad Jhumka, Stephan Klaus, Sorin A. Huss:
A Dependability-Driven System-Level Design Approach for Embedded Systems.
372-377
Electronic Edition (link) BibTeX
- Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe:
A Time Slice Based Scheduler Model for System Level Design.
378-383
Electronic Edition (link) BibTeX
- Jae-Gon Lee, Moo-Kyoung Chung, Ki-Yong Ahn, Sang-Heon Lee, Chong-Min Kyung:
A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.
384-389
Electronic Edition (link) BibTeX
- Ambar A. Gadkari, S. Ramesh:
Automated Synthesis of Assertion Monitors using Visual Specifications.
390-395
Electronic Edition (link) BibTeX
Interactive Presentation
4B:
Logic Synthesis
- Aseem Agarwal, Kaviraj Chopra, David Blaauw:
Statistical Timing Based Optimization using Gate Sizing.
400-405
Electronic Edition (link) BibTeX
- Maxim Teslenko, Elena Dubrova:
An Efficient Algorithm for Finding Double-Vertex Dominators in Circuit Graphs.
406-411
Electronic Edition (link) BibTeX
- Alan Mishchenko, Robert K. Brayton:
SAT-Based Complete Don't-Care Computation for Network Optimization.
412-417
Electronic Edition (link) BibTeX
- Alan Mishchenko, Robert K. Brayton, Jie-Hong Roland Jiang, Tiziano Villa, Nina Yevtushenko:
Efficient Solution of Language Equations Using Partitioned Representations.
418-423
Electronic Edition (link) BibTeX
- G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, Fabien Germain:
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement.
424-429
Electronic Edition (link) BibTeX
Interactive Presentations
4C:
Defect Detection and Characterisation
- Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen:
Memory Testing Under Different Stress Conditions: An Industrial Evaluation.
438-443
Electronic Edition (link) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
Worst-Case and Average-Case Analysis of n-Detection Test Sets.
444-449
Electronic Edition (link) BibTeX
- Huaxing Tang, Gang Chen, Sudhakar M. Reddy, Chen Wang, Janusz Rajski, Irith Pomeranz:
Defect Aware Test Patterns.
450-455
Electronic Edition (link) BibTeX
- Eric Liau, Doris Schmitt-Landsiedel:
Computational Intelligence Characterization Method of Semiconductor Device.
456-461
Electronic Edition (link) BibTeX
Interactive Presentations
4E:
Real-Time Scheduling
Interactive Presentation
4F:
SoC Power Optimisation
- César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique.
502-507
Electronic Edition (link) BibTeX
- Mirko Loghi, Massimo Poncino:
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions.
508-513
Electronic Edition (link) BibTeX
- Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi:
Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints.
514-519
Electronic Edition (link) BibTeX
- Mirko Loghi, Paolo Azzoni, Massimo Poncino:
Tag Overflow Buffering: An Energy-Efficient Cache Architecture.
520-525
Electronic Edition (link) BibTeX
Interactive Presentations
4G:
Embedded Tutorial - Platforms and Tools for Automotive System Design
5A:
System Level Languages,
Verification and Simulation
Interactive Presentations
5B:
Panel Session - Semiconductor Industry Disaggregation vs. Reaggregation:
Who will be the Shark?
5C:
Reliable Memory Design
- Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey:
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories.
574-579
Electronic Edition (link) BibTeX
- Luca Schiano, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano:
On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories.
580-585
Electronic Edition (link) BibTeX
- Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk:
Increasing Register File Immunity to Transient Errors.
586-591
Electronic Edition (link) BibTeX
- Balkaran S. Gill, Michael Nicolaidis, Francis G. Wolff, Christos A. Papachristou, Steven L. Garverick:
An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories.
592-597
Electronic Edition (link) BibTeX
5E:
Execution-Time Analysis
Interactive Presentations
5F:
Battery and Current Considerations in CMOS Design
Interactive Presentations
5G:
Panel Session - Automotive System Architectures
5K:
Keynote
Volume 2
6A:
High-Level Verification
Interactive Presentations
6B:
System Modelling with UML
- Tim Schattkowsky, Wolfgang Müller, Achim Rettberg:
A Model-Based Approach for Executable Specifications on Reconfigurable Hardware.
692-697
Electronic Edition (link) BibTeX
- Alexandre Chureau, Yvon Savaria, El Mostapha Aboulhamid:
The Role of Model-Level Transactors and UML in Functional Prototyping of Systems-on-Chip: A Software-Radio Application.
698-703
Electronic Edition (link) BibTeX
- Elvinia Riccobene, Patrizia Scandurra, Alberto Rosti, Sara Bocchio:
A SoC Design Methodology Involving a UML 2.0 Profile for SystemC.
704-709
Electronic Edition (link) BibTeX
- Petri Kukkala, Jouni Riihimäki, Marko Hännikäinen, Timo D. Hämäläinen, Klaus Kronlöf:
UML 2.0 Profile for Embedded System Design.
710-715
Electronic Edition (link) BibTeX
Interactive Presentations
6C:
Hot Topic - Challenges in Embedded Memory Design and Test
6E:
Parallel and Multithreaded Processor Architectures
Interactive Presentation
6F:
Very Deep Submicron Simulation
Interactive Presentation
6G:
SoC Prototyping and Simulation
- Shankar Mahadevan, Federico Angiolini, Michael Storgaard, Rasmus Grøndahl Olsen, Jens Sparsø, Jan Madsen:
A Network Traffic Generator Model for Fast Network-on-Chip Simulation.
780-785
Electronic Edition (link) BibTeX
- Mehrdad Reshadi, Nikil D. Dutt:
Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation.
786-791
Electronic Edition (link) BibTeX
- Jürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel:
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs.
792-797
Electronic Edition (link) BibTeX
- Franco Fummi, Mirko Loghi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino:
Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation.
798-803
Electronic Edition (link) BibTeX
Interactive Presentation
7A:
Memory Optimisation and Clocking for SoC
Interactive Presentations
7B:
Embedded Tutorial - UML for System-on-Chip Design:
Current Applications and Future Perspectives
7C:
Test Power Reduction and Diagnosis
Interactive Presentations
- Ghenadie Bodean, D. Bodean, A. Labunetz:
New Schemes for Self-Testing RAM.
858-859
Electronic Edition (link) BibTeX
- B. Cheon, E. Lee, Laung-Terng Wang, Xiaoqing Wen, P. Hsu, J. Cho, J. Park, H. Chao, Shianling Wu:
At-Speed Logic BIST for IP Cores.
860-861
Electronic Edition (link) BibTeX
7E:
Scheduling and Memory Optimisation for Multiprocessor Embedded Systems
- Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng:
Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems.
864-869
Electronic Edition (link) BibTeX
- Mahmut T. Kandemir, Guilin Chen:
Locality-Aware Process Scheduling for Embedded MPSoCs.
870-875
Electronic Edition (link) BibTeX
- Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout:
A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms.
876-881
Electronic Edition (link) BibTeX
- Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, Ibrahim Kolcu:
Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems.
882-887
Electronic Edition (link) BibTeX
- Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid:
System Synthesis for Networks of Programmable Blocks.
888-893
Electronic Edition (link) BibTeX
Interactive Presentations
7F:
Layout Issues
Interactive Presentations
7G:
Quantifying Architecture Trade-Off
- Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy:
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies.
926-931
Electronic Edition (link) BibTeX
- Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven:
Compositional Memory Systems for Multimedia Communicating Tasks.
932-937
Electronic Edition (link) BibTeX
- Judita Kruse, Clive Thomsen, Rolf Ernst, Thomas Volling, Thomas Spengler:
Introducing Flexible Quantity Contracts into Distributed SoC and Embedded System Design Processes.
938-943
Electronic Edition (link) BibTeX
Interactive Presentations
8A:
Panel Session - Is There a Market for SystemC Tools?
8B:
Interconnect Solutions:
Timing,
Noise,
and Process Variations
- Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen:
Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model.
952-957
Electronic Edition (link) BibTeX
- Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, Sani R. Nassif:
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction.
958-963
Electronic Edition (link) BibTeX
- Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang:
Stochastic Power Grid Analysis Considering Process Variations.
964-969
Electronic Edition (link) BibTeX
- Jinjun Xiong, King Ho Tam, Lei He:
Buffer Insertion Considering Process Variation.
970-975
Electronic Edition (link) BibTeX
- Baohua Wang, Pinaki Mazumder:
EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation.
976-981
Electronic Edition (link) BibTeX
Interactive Presentations
8C:
Advances in Pattern Generation for Fault Detection and Diagnosis
Interactive Presentations
8E:
Embedded Software Technology
- Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangyu Chen, Ozcan Ozturk:
Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing.
1026-1031
Electronic Edition (link) BibTeX
- Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
BB-GC: Basic-Block Level Garbage Collection.
1032-1037
Electronic Edition (link) BibTeX
- Jacques Combaz, Jean-Claude Fernandez, Thierry Lepley, Joseph Sifakis:
Fine Grain QoS Control for Multimedia Application Software.
1038-1043
Electronic Edition (link) BibTeX
- Massimo Baleani, Alberto Ferrari, Leonardo Mangeruca, Alberto L. Sangiovanni-Vincentelli, Ulrich Freund, Erhard Schlenker, Hans-Jörg Wolff:
Correct-by-Construction Transformations across Design Environments for Model-Based Embedded Software Development.
1044-1049
Electronic Edition (link) BibTeX
- Elaine Cheong, Jie Liu:
galsC: A Language for Event-Driven Embedded Systems.
1050-1055
Electronic Edition (link) BibTeX
Interactive Presentations
8F:
Advanced Analogue Performance Modelling
- Abhishek Somani, Partha Pratim Chakrabarti, Amit Patra:
Mixing Global and Local Competition in Genetic Optimization based Design Space Exploration of Analog Circuits.
1064-1069
Electronic Edition (link) BibTeX
- Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen:
Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces.
1070-1075
Electronic Edition (link) BibTeX
- Gerd Vandersteen, Ludwig De Locht, Snezana Jenei, Yves Rolain, Rik Pintelon:
Estimating Scalable Common-Denominator Laplace-Domain MIMO Models in an Errors-in-Variables Framework.
1076-1081
Electronic Edition (link) BibTeX
- Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen:
CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming.
1082-1087
Electronic Edition (link) BibTeX
Interactive Presentation
8G:
Hot Topic - Biochips:
Principles and Application
9A:
Efficient SAT Based Verification