| 2007 |
|---|
| 11 | EE | Bhaskar Pal,
Ansuman Banerjee,
Pallab Dasgupta,
P. P. Chakrabarti:
BUSpec: A framework for generation of verification aids for standard bus protocol specifications.
Integration 40(3): 285-304 (2007) |
| 2006 |
|---|
| 10 | EE | Ansuman Banerjee,
Bhaskar Pal,
Sayantan Das,
Abhijeet Kumar,
Pallab Dasgupta:
Test generation games from formal specifications.
DAC 2006: 827-832 |
| 9 | EE | Ansuman Banerjee,
Pallab Dasgupta,
P. P. Chakrabarti:
Formal methods for checking realizability of coalitions in 3-party systems.
MEMOCODE 2006: 198 |
| 8 | EE | Prasenjit Basu,
Sayantan Das,
Ansuman Banerjee,
Pallab Dasgupta,
P. P. Chakrabarti,
Chunduri Rama Mohan,
Limor Fix,
Roy Armoni:
Design-Intent Coverage - A New Paradigm for Formal Property Verification.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1922-1934 (2006) |
| 2005 |
|---|
| 7 | EE | Sayantan Das,
Ansuman Banerjee,
Prasenjit Basu,
Pallab Dasgupta,
P. P. Chakrabarti,
Chunduri Rama Mohan,
Limor Fix:
Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model.
VLSI Design 2005: 201-206 |
| 6 | EE | Ansuman Banerjee,
Pallab Dasgupta:
The open family of temporal logics: Annotating temporal operators with input constraints.
ACM Trans. Design Autom. Electr. Syst. 10(3): 492-522 (2005) |
| 2004 |
|---|
| 5 | EE | Sayantan Das,
Prasenjit Basu,
Ansuman Banerjee,
Pallab Dasgupta,
P. P. Chakrabarti,
Chunduri Rama Mohan,
Limor Fix,
Roy Armoni:
Formal verification coverage: computing the coverage gap between temporal specifications.
ICCAD 2004: 198-203 |
| 4 | EE | Bhaskar Pal,
Ansuman Banerjee,
Pallab Dasgupta,
P. P. Chakrabarti:
The BUSpec platform for automated generation of verification aids for standard bus protocols.
MEMOCODE 2004: 119-128 |
| 3 | EE | Ansuman Banerjee,
Pallab Dasgupta,
P. P. Chakrabarti:
Formal Verification of Modules under Real Time Environment Constraints.
VLSI Design 2004: 103-108 |
| 2003 |
|---|
| 2 | EE | Ansuman Banerjee,
Pallab Dasgupta,
Partha Pratim Chakrabarti:
Open computation tree logic with fairness.
ISCAS (5) 2003: 249-252 |
| 2002 |
|---|
| 1 | EE | Arindam Chakrabarti,
Pallab Dasgupta,
P. P. Chakrabarti,
Ansuman Banerjee:
Formal verification of module interfaces against real time specifications.
DAC 2002: 141-145 |
