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Dominique Borrione

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2007
35 Yann Oddos, Katell Morin-Allory, Dominique Borrione: Prototyping Generators for On-line Test Vector Generation Based on PSL Properties. DDECS 2007: 383-388
34EEDominique Borrione, Amr Helmy, Laurence V. Pierre, Julien Schmaltz: A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study. NOCS 2007: 127-136
2006
33EEJulien Schmaltz, Dominique Borrione: Towards a formal theory of on chip communications in the ACL2 logic. ACL2 2006: 47-56
32EEKatell Morin-Allory, Dominique Borrione: Proven correct monitors from PSL specifications. DATE 2006: 1246-1251
31EEKatell Morin-Allory, Laurent Fesquet, Dominique Borrione: Asynchronous Assertion Monitors for multi-Clock Domain System Verification. IEEE International Workshop on Rapid System Prototyping 2006: 98-102
30EEJulien Schmaltz, Dominique Borrione: Formalizing On Chip Communications in a Functional Style. Trustworthy Software 2006
29EEYann Oddos, Katell Morin-Allory, Dominique Borrione: On-Line Test Vector Generation from Temporal Constraints Written in PSL. VLSI-SoC 2006: 397-402
2005
28 Dominique Borrione, Wolfgang J. Paul: Correct Hardware Design and Verification Methods, 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings Springer 2005
27EEGhiath Al Sammane, Dominique Borrione, Remy Chevallier: Verification of behavioral descriptions by combining symbolic simulation and automatic reasoning. ACM Great Lakes Symposium on VLSI 2005: 260-263
26EEJulien Schmaltz, Dominique Borrione: A Generic Network on Chip Model. TPHOLs 2005: 310-325
25EEDiana Toma, Dominique Borrione: Formal Verification of a SHA-1 Circuit Core Using ACL2. TPHOLs 2005: 326-341
2004
24EEDiana Toma, Dominique Borrione, Ghiath Al Sammane: Combining Several Paradigms for Circuit Validation and Verification. CASSIS 2004: 229-249
23EEJulien Schmaltz, Dominique Borrione: A Functional Approach to the Formal Specification of Networks on Chip. FMCAD 2004: 52-66
22EEGhiath Al Sammane, Julien Schmaltz, Diana Toma, Pierre Ostier, Dominique Borrione: TheoSim: combining symbolic simulation and theorem proving for hardware verification. SBCCI 2004: 60-65
2003
21EEGhiath Al Sammane, Diana Toma, Julien Schmaltz, Pierre Ostier, Dominique Borrione: Constrained Symbolic Simulation with Mathematica and ACL2. CHARME 2003: 150-157
20EEDominique Borrione, Menouer Boubekeur, Emil Dumitrescu, Marc Renaudin, Jean-Baptiste Rigaud, Antoine Sirianni: An Approach to the Introduction of Formal Validation in an Asynchronous Circuit Design Flow. HICSS 2003: 279
19EEEmil Dumitrescu, Dominique Borrione: Symbolic Simulation as a Simplifying Strategy for SoC Verification. IWSOC 2003: 378-383
18 Dominique Borrione, Menouer Boubekeur, Laurent Mounier, Marc Renaudin, Antoine Sirianni: Validation of asynchronous circuit specifications using IF/CADP. VLSI-SOC 2003: 86-91
2002
17EEJoel Blasquez, Marten van Hulst, Andrea Fedeli, Jean-Luc Lambert, Dominique Borrione, Coby Hanoch, Pierre Bricaud: Formal Verification Techniques: Industrial Status and Perspectives. DATE 2002: 1050-1051
16 Jorgiano Vidal, David Déharbe, Dominique Borrione: Improving Static Ordering of BDDs for Reachability Analysis. IWLS 2002: 73-77
2001
15EES. Reda, Ayman M. Wahba, Ashraf M. Salem, Dominique Borrione, M. Ghonaimy: On the use of don't cares during symbolic reachability analysis. ISCAS (5) 2001: 121-124
2000
14EEDominique Borrione, Julia Dushina, Laurence V. Pierre: A compositional model for the functional verification of high-level synthesis results. IEEE Trans. VLSI Syst. 8(5): 526-530 (2000)
13 Vanderlei Moraes Rodrigues, Dominique Borrione, Philippe Georgelin: Using the ACL2 Theorem Prover to Reason about VHDL Components. RITA 7(1): 129-148 (2000)
1999
12 Raimund Ubar, Dominique Borrione: Design Error Diagnosis in Digital Circuits without Error Model. VLSI 1999: 281-292
1997
11 Dominique Borrione, F. Vestman, H. Bouamama: An approach to Verilog-VHDL interoperability for synchronous designs. CHARME 1997: 65-87
1996
10 Dominique Borrione, H. Bouamama, David Déharbe, C. Le Faou, Ayman M. Wahba: HDL-Based Integration of Formal Methods and CAD Tools in the PREVAIL Environment. FMCAD 1996: 450-467
1995
9 Ayman M. Wahba, Dominique Borrione: Design error diagnosis in sequential circuits. CHARME 1995: 171-188
8 David Déharbe, Dominique Borrione: Semantics of a verification-oriented subset of VHDL. CHARME 1995: 293-310
7 Dominique Borrione, Ashraf M. Salem: Denotational Semantics of a Synchronous VHDL Subset. Formal Methods in System Design 7(1/2): 53-71 (1995)
1994
6EECatherine Bayol, Bernard Soulas, Dominique Borrione, Fulvio Corno, Paolo Prinetto: A process algebra interpretation of a verification oriented overlanguage of VHDL. EURO-DAC 1994: 506-511
1992
5EEDominique Borrione, Laurence V. Pierre, Ashraf M. Salem: Formal Verification of VHDL Descriptions in the Prevail Environment. IEEE Design & Test of Computers 9(2): 42-56 (1992)
4EEDominique Borrione, Robert Piloty, Dwight D. Hill, Karl J. Lieberherr, Philip Moorby: Three Decades of HDLs: Part II, Conlan Through Verilog. IEEE Design & Test of Computers 9(3): 54-63 (1992)
1989
3 Dominique Borrione, Paolo Prinetto: Zero-Defect Designs, Why and How: Formal Verification vs. Automated Synthesis. IFIP Congress 1989: 233-240
1983
2 Robert Piloty, Dominique Borrione, Mario Barbacci, Donald L. Dietmeyer, Frederick J. Hill, Patrick Skelly: CONLAN Report Springer 1983
1980
1 Robert Piloty, Mario Barbacci, Dominique Borrione, Donald L. Dietmeyer, Frederick J. Hill, Patrick Skelly: An Overview of CONLAN: A Formal Construction Method for Hardware Description Language. IFIP Congress 1980: 199-204

Coauthor Index

1Mario Barbacci [1] [2]
2Catherine Bayol [6]
3Joel Blasquez [17]
4H. Bouamama [10] [11]
5Menouer Boubekeur [18] [20]
6Pierre Bricaud [17]
7Remy Chevallier [27]
8Fulvio Corno [6]
9David Déharbe [8] [10] [16]
10Donald L. Dietmeyer [1] [2]
11Emil Dumitrescu [19] [20]
12Julia Dushina [14]
13C. Le Faou [10]
14Andrea Fedeli [17]
15Laurent Fesquet [31]
16Philippe Georgelin [13]
17M. Ghonaimy [15]
18Coby Hanoch [17]
19Amr Helmy [34]
20Dwight D. Hill [4]
21Frederick J. Hill [1] [2]
22Marten van Hulst [17]
23Jean-Luc Lambert [17]
24Karl J. Lieberherr [4]
25Philip Moorby [4]
26Katell Morin-Allory [29] [31] [32] [35]
27Laurent Mounier [18]
28Yann Oddos [29] [35]
29Pierre Ostier [21] [22]
30Wolfgang J. Paul [28]
31Laurence V. Pierre [5] [14] [34]
32Robert Piloty [1] [2] [4]
33Paolo Prinetto [3] [6]
34S. Reda [15]
35Marc Renaudin [18] [20]
36Jean-Baptiste Rigaud [20]
37Vanderlei Moraes Rodrigues [13]
38Ashraf M. Salem [5] [7] [15]
39Ghiath Al Sammane [21] [22] [24] [27]
40Julien Schmaltz [21] [22] [23] [26] [30] [33] [34]
41Antoine Sirianni [18] [20]
42Patrick Skelly [1] [2]
43Bernard Soulas [6]
44Diana Toma [21] [22] [24] [25]
45Raimund Ubar [12]
46F. Vestman [11]
47Jorgiano Vidal [16]
48Ayman M. Wahba [9] [10] [15]

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Copyright © Wed May 28 02:56:03 2008 by Michael Ley (ley@uni-trier.de)