| 2006 |
|---|
| 49 | EE | Shishpal Rawat,
Raul Camposano,
A. Kahng,
Joseph Sawicki,
Mike Gianfagna,
Naeem Zafar,
A. Sharan:
DFM: where's the proof of value?
DAC 2006: 1061-1062 |
| 48 | EE | Raul Camposano:
Adding Manufacturability to the Quality of Results.
ISQED 2006: 511 |
| 2005 |
|---|
| 47 | EE | Ron Wilson,
Joe Gianelli,
Chris Hamlin,
Ken McElvain,
Steve Leibson,
Ivo Bolson,
Rich Tobias,
Raul Camposano:
Structured/platform ASIC apprentices: which platform will survive your board room?
DAC 2005: 887-888 |
| 46 | EE | Juan Antonio Carballo,
Yervant Zorian,
Raul Camposano,
Andrzej J. Strojwas,
John Kibarian,
Dennis Wassung,
Alex Alexanian,
Steve Wigley,
Neil Kelly:
Guest Editors' Introduction: DFM Drives Changes in Design Flow.
IEEE Design & Test of Computers 22(3): 200-205 (2005) |
| 2004 |
|---|
| 45 | EE | Narendra V. Shenoy,
Jamil Kawa,
Raul Camposano:
Design automation for mask programmable fabrics.
DAC 2004: 192-197 |
| 44 | EE | Ellen Sentovich,
Raul Camposano,
Jim Douglas,
Aurangzeb Khan:
Business models in IP, software licensing, and services.
DAC 2004: 264 |
| 43 | EE | Raul Camposano:
Will the ASIC survive?
SBCCI 2004: 5 |
| 2003 |
|---|
| 42 | EE | Raul Camposano,
Mark Underseth,
Faraydon Karim:
Industry best practices in embedded software.
CODES+ISSS 2003: 72-73 |
| 41 | EE | Raul Camposano:
Keynote Speaker.
ISPD 2003: 3 |
| 2002 |
|---|
| 40 | EE | Jan M. Rabaey,
Joachim Kunkel,
Dennis Brophy,
Raul Camposano,
Davoud Samani,
Larry Lerner,
Rick Hetherington:
What's the next EDA driver?
DAC 2002: 652 |
| 39 | EE | Ralph H. J. M. Otten,
Raul Camposano,
Patrick Groeneveld:
Design Automation for Deepsubmicron: Present and Future.
DATE 2002: 650-659 |
| 38 | EE | Raul Camposano:
From IP to Platforms.
ICCD 2002 |
| 2001 |
|---|
| 37 | EE | A. Lock,
Raul Camposano,
Heinrich Meyr:
The programmable platform: does one size fit all?
DATE 2001: 226-227 |
| 36 | EE | Raul Camposano:
The Expanding Use of Formal Techniques in Electronic Design.
ISQED 2001: 25-26 |
| 35 | | Raul Camposano,
Don MacMillen:
Design Technology for Systems-on-Chip.
VLSI-SOC 2001: 87-96 |
| 2000 |
|---|
| 34 | EE | Raul Camposano,
Olivier Coudert,
Patrick Groeneveld,
Leon Stok,
Ralph H. J. M. Otten:
Timing closure: the solution and its problems.
ASP-DAC 2000: 359-364 |
| 33 | EE | Raul Camposano,
Jacob Greidinger,
Patrick Groeneveld,
Michael Jackson,
Lawrence T. Pileggi,
Louis Scheffer:
Design closure (panel session): hope or hype?
DAC 2000: 176-177 |
| 32 | EE | Warren Savage,
John Chilton,
Raul Camposano:
IP Reuse in the System on a Chip Era.
ISSS 2000: 2-8 |
| 31 | | Raul Camposano,
Warren Savage,
John Chilton:
IP Reuse in System on a Chip Design.
VLSI Design 2000: 20- |
| 30 | EE | Raul Camposano,
Massoud Pedram:
Electronic design automation at the turn of the century: accomplishments and vision of the future.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1401-1403 (2000) |
| 29 | EE | Don MacMillen,
Raul Camposano,
Dwight D. Hill,
Thomas W. Williams:
An industrial view of electronic design automation.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1428-1448 (2000) |
| 1999 |
|---|
| 28 | EE | Raul Camposano,
Kurt Keutzer,
Jerry Fiddler,
Alberto L. Sangiovanni-Vincentelli,
Jim Lansford:
HW and SW in Embedded System Design: Loveboat, Shipwreck, or Ships Passing in the Night.
DAC 1999: 76-77 |
| 1997 |
|---|
| 27 | EE | Raul Camposano,
Andrew Seawright,
Joseph Buck:
Modeling and synthesis of behavior, control and dataflow (tutorial).
ICCAD 1997 |
| 26 | EE | Raul Camposano:
The quarter micron challenge: intergrating physical and logic design.
ISPD 1997: 211 |
| 25 | EE | Uwe Hübner,
Heinrich Theodor Vierhaus,
Raul Camposano:
Partitioning and analysis of static digital CMOS circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(11): 1292-1310 (1997) |
| 1996 |
|---|
| 24 | EE | Raul Camposano:
Behavioral Synthesis.
DAC 1996: 33-34 |
| 23 | EE | Jörg Wilberg,
A. Kuth,
Raul Camposano,
Wolfgang Rosenstiel,
Heinrich Theodor Vierhaus:
A Design Exploration Environment.
Great Lakes Symposium on VLSI 1996: 77-80 |
| 1995 |
|---|
| 22 | EE | Ansgar Bredenfeld,
Raul Camposano:
Tool Integration and Construction Using Generated Graph-Based Design Representations.
DAC 1995: 94-99 |
| 21 | EE | Paul-Gerhard Plöger,
Jörg Wilberg,
Michel Langevin,
Raul Camposano:
WWW based structuring of codesigns.
ISSS 1995: 138-143 |
| 20 | EE | Wolfgang Meyer,
Raul Camposano:
Active timing multilevel fault-simulation with switch-level accuracy.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(10): 1241-1256 (1995) |
| 1994 |
|---|
| 19 | EE | Jörg Wilberg,
Raul Camposano,
Wolfgang Rosenstiel:
Design flow for hardware/software cosynthesis of a video compression system.
CODES 1994: 73-80 |
| 18 | EE | Nikil D. Dutt,
David Agnew,
Raul Camposano,
Antun Domic,
Manfred Wiesel,
Hiroto Yasuura:
Design Reuse: Fact or Fiction? (Panel).
DAC 1994: 562 |
| 17 | EE | Heinz-Josef Eikerling,
Ralf Hunstock,
Raul Camposano:
Optimization of hierarchical designs using partitioning and resynthesis.
ICCAD 1994: 707-712 |
| 16 | | Jörg Wilberg,
Raul Camposano,
Ursula Westerholz,
Uwe Steinhausen:
Design of an Embedded Video Compression System - A Quantitative Approach.
ICCD 1994: 428-431 |
| 1993 |
|---|
| 15 | | David Agnew,
Luc J. M. Claesen,
Raul Camposano:
Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL '93, sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC, Ottawa, Ontario, Canada, 26-28 April, 1993
North-Holland 1993 |
| 14 | EE | Wolfgang Meyer,
Raul Camposano:
Fast Hierarchical Multi-Level Fault Simulation of Sequential Circuits with Switch-Level Accuracy.
DAC 1993: 515-519 |
| 1992 |
|---|
| 13 | | James H. Aylor,
Raul Camposano,
Michael A. Schuette,
Wayne Wolf,
Nam S. Woo:
The Future of Embedded System Design.
ICCD 1992: 144-146 |
| 1991 |
|---|
| 12 | EE | Reinaldo A. Bergamaschi,
Raul Camposano,
Michael Payer:
Data-Path Synthesis Using Path Analysis.
DAC 1991: 591-596 |
| 11 | EE | Raul Camposano,
L. F. Saunders,
R. M. Tabet:
VHDL as Input for High-Level Synthesis.
IEEE Design & Test of Computers 8(1): 43-49 (1991) |
| 10 | EE | Raul Camposano:
Path-based scheduling for synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(1): 85-93 (1991) |
| 1990 |
|---|
| 9 | EE | Raul Camposano:
From Behavior to Structure: High-Level Synthesis.
IEEE Design & Test of Computers 7(5): 8-19 (1990) |
| 1989 |
|---|
| 8 | | Raul Camposano:
Behavior-Preserving Transformations for High-Level Synthesis.
Hardware Specification, Verification and Synthesis 1989: 106-128 |
| 7 | EE | Raul Camposano,
Wolfgang Rosenstiel:
Synthesizing circuits from behavioural descriptions.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(2): 171-180 (1989) |
| 1988 |
|---|
| 6 | EE | Michael C. McFarland,
Alice C. Parker,
Raul Camposano:
Tutorial on High-Level Synthesis.
DAC 1988: 330-336 |
| 5 | EE | Raul Camposano:
Design Process Model in the Yorktown Silicon Compiler.
DAC 1988: 489-494 |
| 1985 |
|---|
| 4 | EE | Raul Camposano:
Synthesis techniques for digital systems design.
DAC 1985: 475-481 |
| 1984 |
|---|
| 3 | | Detlef Schmid,
Raul Camposano,
Wolfgang Rosenstiel:
Automatischer Entwurf hochintegrierter Schaltungen aus Beschreibungen der Schaltungsfunktion.
GI Jahrestagung 1984: 391-406 |
| 1981 |
|---|
| 2 | | Raul Camposano:
Concurrency in Functional Descriptions.
Selected Papers from the First and the Second European Workshop on Application and Theory of Petri Nets 1981: 45-49 |
| 1979 |
|---|
| 1 | | Hans Wojtkowiak,
Raul Camposano:
Digital Systems Design with Nets: An Example.
Microcomputing 1979: 135-154 |
