M. Graziano
List of publications from the
| 2008 |
| 13 | EE | Mariagrazia Graziano,
Gianluca Piccinini:
Statistical power supply dynamic noise prediction in hierarchical power grid and package networks.
Integration 41(4): 524-538 (2008) |
| 2007 |
| 12 | EE | Marco Crepaldi,
Mario R. Casu,
Mariagrazia Graziano,
Maurizio Zamboni:
An effective AMS top-down methodology applied to the design of a mixed-signal UWB system-on-chip.
DATE 2007: 1424-1429 |
| 2006 |
| 11 | EE | Cristiano Forzan,
Davide Pandini,
Mariagrazia Graziano:
Power Supply Selective Mapping for Accurate Timing Analysis.
J. Low Power Electronics 2(1): 105-112 (2006) |
| 2005 |
| 10 | EE | Mariagrazia Graziano,
Cristiano Forzan,
Davide Pandini:
Power Supply Selective Mapping for Accurate Timing Analysis.
PATMOS 2005: 267-276 |
| 2004 |
| 9 | | Mario R. Casu,
Mariagrazia Graziano,
Guido Masera,
Gianluca Piccinini,
Maurizio Zamboni:
An electromigration and thermal model of power wires for a priori high-level reliability prediction.
IEEE Trans. VLSI Syst. 12(4): 349-358 (2004) |
| 8 | EE | Mariagrazia Graziano,
Mario R. Casu,
Guido Masera,
Gianluca Piccinini,
Maurizio Zamboni:
Effects of temperature in deep-submicron global interconnect optimization in future technology nodes.
Microelectronics Journal 35(10): 849-857 (2004) |
| 2003 |
| 7 | EE | Mario R. Casu,
Mariagrazia Graziano,
Gianluca Piccinini,
Guido Masera,
Maurizio Zamboni:
Effects of Temperature in Deep-Submicron Global Interconnect Optimization.
PATMOS 2003: 90-100 |
| 6 | EE | Mario R. Casu,
Mariagrazia Graziano,
Guido Masera,
Gianluca Piccinini,
Maurizio Zamboni:
Coupled electro-thermal modeling and optimization of clock networks.
Microelectronics Journal 34(12): 1175-1185 (2003) |
| 2002 |
| 5 | EE | Mario R. Casu,
Mariagrazia Graziano,
Guido Masera,
Gianluca Piccinini,
M. M. Prono,
Maurizio Zamboni:
Clock Distribution Network Optimization under Self-Heating and Timing Constraints.
PATMOS 2002: 198-208 |
| 2001 |
| 4 | EE | Mariagrazia Graziano,
Guido Masera,
Gianluca Piccinini,
Maurizio Zamboni:
Hierarchical power supply noise evaluation for early power grid design prediction.
SLIP 2001: 183-188 |
| 3 | EE | Marco Delaurenti,
Mariagrazia Graziano,
Guido Masera,
Gianluca Piccinini,
Maurizio Zamboni:
Switching Noise Analysis Framework For High Speed Logic Families.
VLSI Design 2001: 524-530 |
| 2000 |
| 2 | EE | Mariagrazia Graziano,
Marco Delaurenti,
Guido Masera,
Gianluca Piccinini,
Maurizio Zamboni:
Noise Safety Design Methodologies.
ISQED 2000: 157- |
| 1 | EE | Mariagrazia Graziano,
Marco Delaurenti,
Maurizio Zamboni:
Power supply design parameters prediction for high performance IC design flows.
SLIP 2000: 61-67 |