Renato Fernandes Hentschke

2007
12	EE	Renato Fernandes Hentschke, Ricardo Reis: A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. ISCAS 2007: 2036-2039
11	EE	Renato Fernandes Hentschke, Jaganathan Narasimham, Marcelo O. Johann, Ricardo Augusto da Luz Reis: Maze routing steiner trees with effective critical sink optimization. ISPD 2007: 135-142
10	EE	Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis: 3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. ISVLSI 2007: 67-72
9	EE	Guilherme Flach, Marcelo de Oliveira Johann, Renato Fernandes Hentschke, Ricardo Reis: Cell placement on graphics processing units. SBCCI 2007: 87-92
2006
8	EE	Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis: Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. SBCCI 2006: 220-225
7	EE	Renato Fernandes Hentschke, Sandro Sawicki, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias. VLSI-SoC 2006: 128-133
2005
6	EE	Renato Fernandes Hentschke, Jagannathan Narasimhan, David S. Kung: Improving run times by pruned application of synthesis transforms. SBCCI 2005: 38-43
2004
5		Júlio C. B. de Mattos, Lisane B. de Brisolara, Renato Fernandes Hentschke, Luigi Carro, Flávio Rech Wagner: Design Space Exploration with Automatic Generation of IP-Based Embedded Software. DIPES 2004: 237-246
4	EE	Fernanda Lima Kastensmidt, Gustavo Neuberger, Renato Fernandes Hentschke, Luigi Carro, Ricardo Reis: Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. IEEE Design & Test of Computers 21(6): 552-562 (2004)
2003
3	EE	Renato Fernandes Hentschke, Ricardo Reis: Plic-Plac: a novel constructive algorithm for placement. ISCAS (5) 2003: 461-464
2	EE	Renato Fernandes Hentschke, Ricardo Augusto da Luz Reis: Improving Simulated Annealing Placement by Applying Random and Greedy Mixed Perturbations. SBCCI 2003: 267-
1		Renato Fernandes Hentschke, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: A study on the performance of fast initial placement algorithms. VLSI-SOC 2003: 204-

Coauthor Index

1	Lisane B. de Brisolara	[5]
2	Luigi Carro	[4] [5]
3	Guilherme Flach	[8] [9] [10]
4	Marcelo de Oliveira Johann (Marcelo O. Johann)	[1] [7] [9] [11]
5	Fernanda Gusmão de Lima Kastensmidt (Fernanda Gusmão de Lima, Fernanda Lima Kastensmidt)	[4]
6	David S. Kung	[6]
7	Júlio C. B. de Mattos	[5]
8	Jaganathan Narasimham	[11]
9	Jagannathan Narasimhan	[6]
10	Gustavo Neuberger	[4]
11	Felipe Pinto	[8] [10]
12	Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis)	[1] [2] [3] [4] [7] [8] [9] [10] [11] [12]
13	Sandro Sawicki	[7]
14	Flávio Rech Wagner	[5]

Colors in the list of coauthors