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Jingcao Hu

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2006
11EEJingcao Hu, Ümit Y. Ogras, Radu Marculescu: System-Level Buffer Allocation for Application-Specific Networks-on-Chip Router Design. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2919-2933 (2006)
2005
10EEÜmit Y. Ogras, Jingcao Hu, Radu Marculescu: Communication-Centric SoC Design for Nanoscale Domain. ASAP 2005: 73-78
9EEÜmit Y. Ogras, Jingcao Hu, Radu Marculescu: Key research problems in NoC design: a holistic perspective. CODES+ISSS 2005: 69-74
8EEJingcao Hu, Radu Marculescu: Energy- and performance-aware mapping for regular NoC architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 551-562 (2005)
2004
7EEJingcao Hu, Radu Marculescu: DyAD: smart routing for networks-on-chip. DAC 2004: 260-263
6EEJingcao Hu, Radu Marculescu: Energy-Aware Communication and Task Scheduling for Network-on-Chip Architectures under Real-Time Constraints. DATE 2004: 234-239
5EEJingcao Hu, Radu Marculescu: Application-specific buffer space allocation for networks-on-chip router design. ICCAD 2004: 354-361
4EEJingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu: Architecting voltage islands in core-based system-on-a-chip designs. ISLPED 2004: 180-185
2003
3EEJingcao Hu, Radu Marculescu: Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures. DATE 2003: 10688-10693
2002
2EEJingcao Hu, Yangdong Deng, Radu Marculescu: System-Level Point-to-Point Communication Synthesis Using Floorplanning Information. ASP-DAC 2002: 573-579
1EEJingcao Hu, Yangdong Deng, Radu Marculescu: System-Level Point-to-Point Communication Synthesis using Floorplanning Information. VLSI Design 2002: 573-579

Coauthor Index

1Yangdong Deng [1] [2]
2Nagu R. Dhanwada [4]
3Radu Marculescu [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
4Ümit Y. Ogras [9] [10] [11]
5Youngsoo Shin [4]

Copyright © Wed May 28 02:56:03 2008 by Michael Ley (ley@uni-trier.de)