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Michael Hutton

Mike Hutton

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2008
26 Mike Hutton, Paul Chow: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008 ACM 2008
25EEYan Lin, Lei He, Mike Hutton: Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs. IEEE Trans. VLSI Syst. 16(2): 124-133 (2008)
2007
24 André DeHon, Mike Hutton: Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007 ACM 2007
23EEPaul Chow, Mike Hutton: Integrating FPGAs in high-performance computing: introduction. FPGA 2007: 131
22EEJoachim Pistorius, Mike Hutton, Jay Schleicher, Mihail Iotov, Enoch Julias, Kumara Tharmalingam: Equivalence Verification of FPGA and Structured ASIC Implementations. FPL 2007: 423-428
21EEDwayne Burns, Ciaran Toal, Kieran McLaughlin, Sakir Sezer, Mike Hutton, Kevin Cackovic: An FPGA Based Memory Efficient Shared Buffer Implementation. FPL 2007: 661-664
20EELei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig: Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ICCAD 2007: 370-375
19EEShuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Michael Hutton, Truman Collins, Sridhar Srinivasan, Nan-Chi Chou, Peter Suaris, Chung-Kuan Cheng: Efficient Timing Analysis With Known False Paths Using Biclique Covering. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 959-969 (2007)
2006
18 Mike Hutton, Joni Dambre: The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings ACM 2006
17EEShuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan Cheng, Michael Hutton: Efficient static timing analysis using a unified framework for false paths and multi-cycle paths. ASP-DAC 2006: 73-78
16EEMichael Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo: A methodology for FPGA to structured-ASIC synthesis and verification. DATE Designers' Forum 2006: 64-69
15EEMike Hutton: FPGA Architecture Design Methodology. FPL 2006: 1
14EELerong Cheng, Jinjun Xiong, Lei He, Mike Hutton: FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. FPL 2006: 1-6
13EEMike Hutton, Yan Lin, Lei He: Placement and Timing for FPGAs Considering Variations. FPL 2006: 1-7
12EEShuo Zhou, Yi Zhu, Yuanfang Hu, Ronald L. Graham, Mike Hutton, Chung-Kuan Cheng: Timing model reduction for hierarchical timing analysis. ICCAD 2006: 415-422
2005
11 Igor L. Markov, Mike Hutton: The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings ACM 2005
10EEDavid M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose: The Stratix II logic and routing architecture. FPGA 2005: 14-20
9EEMike Hutton, David Karchmer, Bryan Archell, Jason Govig: Efficient static timing analysis and applications using edge masks. FPGA 2005: 174-183
8 Boris Ratchev, Mike Hutton, David Mendel: Coping With Uncertainty in FPGA Architecture Design. FPL 2005: 662-665
7 Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan Cheng, Michael Hutton, Truman Collins, Sridhar Srinivasan, Nan-Chi Chou, Peter Suaris: Improving the efficiency of static timing analysis with false paths. ICCAD 2005: 527-531
6EELei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton: Challenges and opportunities for low power FPGAs in nanometer technologies. ISLPED 2005: 90
2004
5EEMichael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini: Improving FPGA Performance and Area Using an Adaptive Logic Module. FPL 2004: 135-144
4EEMike Hutton: Architecture and CAD for FPGAs. SBCCI 2004: 3
3EEMike Hutton: Advances and trends in FPGA design. SBCCI 2004: 8
2003
2EEJoachim Pistorius, Mike Hutton: Placement rent exponent calculation methods, temporal behaviour and FPGA architecture evaluation. SLIP 2003: 31-38
2002
1EEMichael Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh Patel, Bruce Pedersen, Jay Schleicher, Sergey Shumarayev: Interconnect enhancements for a high-speed PLD architecture. FPGA 2002: 3-10

Coauthor Index

1Elias Ahmed [10]
2Bryan Archell [9]
3Gregg Baeckler [5] [10] [16]
4Vaughn Betz [10]
5Mark Bourgeault [5] [10]
6Dwayne Burns [21]
7Kevin Cackovic [21]
8David Cashman [10]
9Vinson Chan [1]
10Deming Chen [20]
11Hongyu Chen [7] [17] [19]
12Chung-Kuan Cheng [7] [12] [17] [19]
13Lei Cheng [20]
14Lerong Cheng [14]
15Sammy Cheung [16]
16Nan-Chi Chou [7] [19]
17Paul Chow [23] [26]
18Kar Keng Chua [16]
19Richard Cliff [10]
20Truman Collins [7] [19]
21Joni Dambre (J. Dambre) [18]
22André DeHon [24]
23David R. Galloway [10]
24Jason Govig [9] [20]
25Ronald L. Graham [12]
26Lei He [6] [13] [14] [25]
27Yuanfang Hu [12]
28Mihail Iotov [22]
29Enoch Julias [22]
30Sinan Kaptanoglu [5]
31David Karchmer [9]
32Peter Kazarian [1]
33Henry Kim [5]
34Christopher Lane [10]
35Andy Lee [5] [10]
36Paul Leventis [10]
37David M. Lewis [5] [10]
38Yan Lin [13] [25]
39Igor L. Markov [11]
40Sandy Marquardt [10]
41Victor Maruri [1]
42Cameron McClintock [10]
43Kieran McLaughlin [21]
44David Mendel [8]
45Tony Ngai [1]
46Ketan Padalia [5] [10]
47Jim Park [1]
48Rakesh Patel [1]
49Bruce Pedersen [1] [5] [10]
50Hee Kong Phoo [16]
51Joachim Pistorius [2] [22]
52Giles Powell [10]
53Boris Ratchev [5] [8] [10]
54Srinivas Reddy [10]
55Jonathan Rose [10]
56Rahul Saini [5]
57Jay Schleicher [1] [5] [10] [16] [22]
58Sakir Sezer [21]
59Sergey Shumarayev [1]
60Sridhar Srinivasan [7] [19]
61Kevin Stevens [10]
62Peter Suaris (Peter Ramyalal Suaris) [7] [19]
63Kumara Tharmalingam [22]
64Ciaran Toal [21]
65Tim Tuan [6]
66Steven J. E. Wilton [6]
67Martin D. F. Wong (D. F. Wong) [20]
68Jinjun Xiong [14]
69Bo Yao [7] [17] [19]
70Richard Yuan [5] [10] [16]
71Shuo Zhou [7] [12] [17] [19]
72Yi Zhu [7] [12] [17] [19]

Colors in the list of coauthors

Copyright © Fri Jan 2 03:50:28 2009 by Michael Ley (ley@uni-trier.de)