| 2004 |
| 21 | EE | Victor N. Kravets,
Prabhakar Kudva:
Implicit enumeration of structural changes in circuit optimization.
DAC 2004: 438-441 |
| 2003 |
| 20 | EE | Yiu-Hing Chan,
Prabhakar Kudva,
Lisa B. Lacey,
Gregory A. Northrop,
Thomas E. Rosser:
Physical synthesis methodology for high performance microprocessors.
DAC 2003: 696-701 |
| 19 | EE | Victor N. Kravets,
Prabhakar Kudva:
Understanding metrics in logic synthesis for routability enhancement.
SLIP 2003: 3-5 |
| 18 | EE | Prabhakar Kudva,
Andrew Sullivan,
William E. Dougherty:
Measurements for structural logic synthesis optimizations.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 665-674 (2003) |
| 2002 |
| 17 | EE | Hans M. Jacobson,
Prabhakar Kudva,
Pradip Bose,
Peter W. Cook,
Stanley Schuster:
Synchronous Interlocked Pipelines.
ASYNC 2002: 3-12 |
| 16 | EE | Prabhakar Kudva,
Andrew Sullivan,
William E. Dougherty:
Metrics for structural logic synthesis.
ICCAD 2002: 551-556 |
| 15 | | Prabhakar Kudva,
Andrew Sullivan,
William E. Dougherty:
Metrics for Structural Logic Synthesis.
IWLS 2002: 1-6 |
| 14 | EE | Pradip Bose,
David Brooks,
Alper Buyuktosunoglu,
Peter W. Cook,
K. Das,
Philip G. Emma,
Michael Gschwind,
Hans M. Jacobson,
Tejas Karkhanis,
Prabhakar Kudva,
Stanley Schuster,
James E. Smith,
Viji Srinivasan,
Victor V. Zyuban,
David H. Albonesi,
Sandhya Dwarkadas:
Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.
PACS 2002: 1-17 |
| 2000 |
| 13 | EE | Hans M. Jacobson,
Erik Brunvand,
Ganesh Gopalakrishnan,
Prabhakar Kudva:
High-Level Asynchronous System Design Using the ACK Framework.
ASYNC 2000: 93-103 |
| 12 | EE | Wilm E. Donath,
Prabhakar Kudva,
Leon Stok,
Paul Villarrubia,
Lakshmi N. Reddy,
Andrew Sullivan,
Kanad Chakraborty:
Transformational Placement and Synthesis.
DATE 2000: 194-201 |
| 11 | EE | David Brooks,
Pradip Bose,
Stanley Schuster,
Hans M. Jacobson,
Prabhakar Kudva,
Alper Buyuktosunoglu,
John-David Wellman,
Victor V. Zyuban,
Manish Gupta,
Peter W. Cook:
Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors.
IEEE Micro 20(6): 26-44 (2000) |
| 10 | EE | Frederik Beeftink,
Prabhakar Kudva,
David S. Kung,
Ruchir Puri,
Leon Stok:
Combinatorial cell design for CMOS libraries.
Integration 29(1): 67-93 (2000) |
| 1999 |
| 9 | EE | Wilm E. Donath,
Prabhakar Kudva,
Lakshmi N. Reddy:
Performance Driven Optimization of Network Length in Physical Placement.
ICCD 1999: 258-265 |
| 8 | EE | Ganesh Gopalakrishnan,
Prabhakar Kudva,
Erik Brunvand:
Peephole optimization of asynchronous macromodule networks.
IEEE Trans. VLSI Syst. 7(1): 30-37 (1999) |
| 1998 |
| 7 | EE | Frederik Beeftink,
Prabhakar Kudva,
David S. Kung,
Leon Stok:
Gate-size selection for standard cell libraries.
ICCAD 1998: 545-550 |
| 1997 |
| 6 | | José A. Tierno,
Prabhakar Kudva:
Asynchronous Transpose-Matrix Architectures.
ICCD 1997: 423-428 |
| 1996 |
| 5 | EE | Prabhakar Kudva,
Ganesh Gopalakrishnan,
Hans M. Jacobson:
A Technique for Synthesizing Distributed Burst-mode Circuits.
DAC 1996: 67-70 |
| 4 | EE | Prabhakar Kudva,
Ganesh Gopalakrishnan,
Hans M. Jacobson,
Steven M. Nowick:
Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes.
DAC 1996: 77-82 |
| 1994 |
| 3 | | Prabhakar Kudva,
Ganesh Gopalakrishnan,
Erik Brunvand,
Venkatesh Akella:
Performance Analysis and Optimization of Asynchronous Circuits.
ICCD 1994: 221-224 |
| 2 | | Ganesh Gopalakrishnan,
Prabhakar Kudva,
Erik Brunvand:
Peephole Optimization of Asynchronous Macromodule Networks.
ICCD 1994: 442-446 |
| 1992 |
| 1 | | Prabhat Jain,
Prabhakar Kudva,
Ganesh Gopalakrishnan:
Towards a Verification Technique for Large Synchronous Circuits.
CAV 1992: 109-122 |