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Yusuf Leblebici

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2008
41EEAlessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. FPGA 2008: 181-190
2007
40EEMilos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani: Design and realization of a fault-tolerant 90nm CMOS cryptographic engine capable of performing under massive defect density. ACM Great Lakes Symposium on VLSI 2007: 204-207
39EEM. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays. ICCAD 2007: 765-772
38EEFrancesco Regazzoni, Stéphane Badel, Thomas Eisenbarth, Johann Großschädl, Axel Poschmann, Zeynep Toprak Deniz, Marco Macchetti, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne: A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. ICSAMOS 2007: 209-214
37EEStéphane Badel, Yusuf Leblebici: Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage. ISCAS 2007: 1871-1874
36EEIlhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli: Early wire characterization for predictable network-on-chip global interconnects. SLIP 2007: 57-64
35EEPaul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit CoRR abs/0710.4727: (2007)
2006
34EEAyse Kivilcim Coskun, Tajana Simunic Rosing, Yusuf Leblebici, Giovanni De Micheli: A simulation methodology for reliability analysis in multi-core SoCs. ACM Great Lakes Symposium on VLSI 2006: 95-99
33EEArmin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs. ISCAS 2006
32EEElizabeth J. Brauer, Ilhan Hatirnaz, Stéphane Badel, Yusuf Leblebici: Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design. ISCAS 2006
31EEO. C. Akgun, Yusuf Leblebici: Weak inversion performance of CMOS and DCVSPG logic families in sub-300 mV range. ISCAS 2006
30EEDerin Derin Harmanci, Nuria Pazos, Paolo Ienne, Yusuf Leblebici: A Predictable Communication Scheme for Embedded Multiprocessor Systems. VLSI-SoC 2006: 152-157
29EEStéphane Badel, Ilhan Hatirnaz, Yusuf Leblebici, Elizabeth J. Brauer: Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells. VLSI-SoC 2006: 234-238
28EEZeynep Toprak Deniz, Yusuf Leblebici, Eric A. Vittoz: Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation. VLSI-SoC 2006: 379-384
27EEAyse Kivilcim Coskun, Tajana Simunic, Kresimir Mihic, Giovanni De Micheli, Yusuf Leblebici: Analysis and Optimization of MPSoC Reliability. J. Low Power Electronics 2(1): 56-69 (2006)
2005
26EESorin Cotofana, Alexandre Schmid, Yusuf Leblebici, Adrian M. Ionescu, Oliver Soffke, Peter Zipf, Manfred Glesner, A. Rubio: CONAN - A Design Exploration Framework for Reliable Nano-Electronics. ASAP 2005: 260-267
25EEPaul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit. DATE 2005: 258-263
24EESoner Yaldiz, Alper Demir, Serdar Tasiran, Paolo Ienne, Yusuf Leblebici: Characterizing and Exploiting Task-Load Variability and Correlation for Energy Management in multi-core systems. ESTImedia 2005: 135-140
23EEZeynep Toprak Deniz, Yusuf Leblebici: Low-power current mode logic for improved DPA-resistance in embedded systems. ISCAS (2) 2005: 1059-1062
22EEMehmet Derin Harmanci, Nuria Pazos Escudero, Yusuf Leblebici, Paolo Ienne: Quantitative modelling and comparison of communication schemes to guarantee quality-of-service in networks-on-chip. ISCAS (2) 2005: 1782-1785
21EETakahide Oya, Tetsuya Asai, Yoshihito Amemiya, Alexandre Schmid, Yusuf Leblebici: Single-electron circuit for inhibitory spiking neural network with fault-tolerant architecture. ISCAS (3) 2005: 2535-2538
20EEArmin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: A low-power, multichannel gated oscillator-based CDR for short-haul applications. ISLPED 2005: 107-110
19EEMilos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on a-priori Functional Fault- Tolerance Analysis. VLSI-SoC 2005: 111-125
18EETakahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihito Amemiya: On the fault tolerance of a clustered single-electron neural network for differential enhancement. IEICE Electronic Express 2(3): 76-80 (2005)
2004
17 Elizabeth J. Brauer, Yusuf Leblebici: Low noise MCML prefix adders using 0.18 µm CMOS technology. Circuits, Signals, and Systems 2004: 467-470
16 Elizabeth J. Brauer, Yusuf Leblebici: Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic. Circuits, Signals, and Systems 2004: 483-487
15EEAlexandre Schmid, Yusuf Leblebici: A Highly Fault Tolerant PLA Architecture for Failure-Prone Nanometer CMOS and Novel Quantum Device Technologies. DFT 2004: 39-47
14EEAlexandre Schmid, Yusuf Leblebici: Robust and fault-tolerant circuit design for nanometer-scale devices and single-electron transistors. ISCAS (3) 2004: 685-688
13 Ilhan Hatirnaz, Yusuf Leblebici: Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reduction. ISCAS (5) 2004: 185-188
12 Stéphane Badel, Alexandre Schmid, Yusuf Leblebici: Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture. ISCAS (5) 2004: 780-783
11EEAlexandre Schmid, Yusuf Leblebici: Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors. IEEE Trans. VLSI Syst. 12(11): 1156-1166 (2004)
2003
10EEStéphane Badel, Alexandre Schmid, Yusuf Leblebici: VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications. ESANN 2003: 445-450
9EEZeynep Toprak Deniz, Yusuf Leblebici: Design and realization of a modular 200 MSample/s 12-bit pipelined A/D converter block using deep-submicron digital CMOS technology. ISCAS (1) 2003: 841-844
8EETuran Demirci, Ilhan Hatirnaz, Yusuf Leblebici: Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity. ISCAS (5) 2003: 453-456
1999
7EEIlhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici: Realization of a programmable rank-order filter architecture using capacitive threshold logic gates. ISCAS (1) 1999: 435-438
6EEAlexandre Schmid, D. Bowler, R. Baumgartner, Yusuf Leblebici: A novel analog-digital flash converter architecture based on capacitive threshold gates. ISCAS (2) 1999: 172-175
1993
5EEYung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang: ILLIADS: a fast timing and reliability simulator for digital MOS circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 12(9): 1387-1402 (1993)
1992
4EEYusuf Leblebici, Sung-Mo Kang: Modeling of nMOS transistors for simulation of hot-carrier-induced device and circuit degradation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(2): 235-246 (1992)
1991
3 Yung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang: New Simulation Methods for MOS VLSI Timing and Reliability. ICCAD 1991: 162-165
2EECarlos H. Díaz, Sung-Mo Kang, Yusuf Leblebici: An accurate analytical delay model for BiCMOS driver circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 577-588 (1991)
1990
1 Yusuf Leblebici, Sung-Mo Kang: An Integrated Hot-Carrier Degradation Simulator for VLSI Reliability Analysis. ICCAD 1990: 400-403

Coauthor Index

1O. C. Akgun [31]
2Yoshihito Amemiya [18] [21]
3Tetsuya Asai [18] [21]
4Seyed Mojtaba Atarodi [20] [25] [33] [35]
5Panagiotis Athanasopoulos [41]
6David Atienza [36] [39]
7Stéphane Badel [10] [12] [29] [32] [36] [37] [38]
8R. Baumgartner [6]
9Didier Bouvet [39]
10D. Bowler [6]
11Elizabeth J. Brauer [16] [17] [29] [32]
12Philip Brisk [41]
13Alessandro Cevrero [41]
14Ayse Kivilcim Coskun [27] [34]
15Sorin Cotofana (Sorin Dan Cotofana) [26]
16Alper Demir [24]
17Turan Demirci [8]
18Zeynep Toprak Deniz [9] [23] [28] [38]
19Carlos H. Díaz [2]
20Thomas Eisenbarth [38]
21Nuria Pazos Escudero [22]
22Maria Gabrani [40]
23Manfred Glesner [26]
24Johann Großschädl (Johann Groszschaedl) [38]
25Frank K. Gürkaynak [7] [40] [41]
26Derin Derin Harmanci [30]
27Mehmet Derin Harmanci [22]
28Ilhan Hatirnaz [7] [8] [13] [29] [32] [36]
29Paolo Ienne [22] [24] [30] [38] [41]
30Adrian M. Ionescu [26] [39]
31M. Haykel Ben Jamaa [39]
32Sung-Mo Kang [1] [2] [3] [4] [5]
33Marco Macchetti [38]
34Giovanni De Micheli [27] [34] [36] [39]
35Kresimir Mihic [27]
36Kirsten E. Moselund [39]
37Paul Muller [20] [25] [33] [35]
38Srinivasan Murali [36]
39Takahide Oya [18] [21]
40Christof Paar [38]
41Hadi Parandeh-Afshar [41]
42Nuria Pazos [30] [36]
43Axel Poschmann [38]
44Laura Pozzi [38]
45Francesco Regazzoni [38]
46A. Rubio [26]
47Alexandre Schmid [6] [10] [11] [12] [14] [15] [18] [19] [21] [26] [40]
48Yung-Ho Shih [3] [5]
49Tajana Simunic (Tajana Simunic Rosing) [27] [34]
50Oliver Soffke [26]
51Milos Stanisavljevic [19] [40]
52Armin Tajalli [20] [25] [33] [35]
53Serdar Tasiran [24]
54Ajay K. Verma [41]
55Eric A. Vittoz [28]
56Soner Yaldiz [24]
57Peter Zipf [26]

Colors in the list of coauthors

Copyright © Wed May 28 02:56:03 2008 by Michael Ley (ley@uni-trier.de)