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Miriam Leeser

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2008
52EEXiaojun Wang, Miriam Leeser: Efficient FPGA implementation of qr decomposition using a systolic array architecture. FPGA 2008: 260
2007
51EESherman Braganza, Miriam Leeser: The 1D Discrete Cosine Transform For Large Point Sizes Implemented On Reconfigurable Hardware. ASAP 2007: 101-106
50EENicholas Moore, Albert Conti, Miriam Leeser, Laurie A. Smith King: Vforce: An Extensible Framework for Reconfigurable Supercomputing. IEEE Computer 40(3): 39-49 (2007)
2006
49 Joshua Noseworthy, Miriam Leeser: Efficient Use of Communications Between an FPGAs Embedded Processor and its Reconfigurable Logic. ERSA 2006: 191-197
48EEXiaojun Wang, Sherman Braganza, Miriam Leeser: Advanced Components in the Variable Precision Floating-Point Library. FCCM 2006: 249-258
47EEHaiqian Yu, Miriam Leeser: Automatic Sliding Window Operation Optimization for FPGA-Based. FCCM 2006: 76-88
46EEJoshua Noseworthy, Miriam Leeser: Efficient use of communications between an FPGA's embedded processor and its reconfigurable logic. FPGA 2006: 233
45EEBen Cordes, Miriam Leeser, Eric Miller, Richard W. Linderman: Poster reception - Improving the performance of parallel backprojection on a reconfigurable supercomputer. SC 2006: 149
44EEPeter Soderquist, Miriam Leeser, Juan Carlos Rojas: Enabling MPEG-2 video playback in embedded systems through improved data cache efficiency. IEEE Transactions on Multimedia 8(1): 81-89 (2006)
2005
43EEBen Cordes, Jennifer G. Dy, Miriam Leeser, James Goebel: Enabling a RealTime Solution for Neuron Detection with Reconfigurable Hardware (abstract only). FPGA 2005: 264
42EEBen Cordes, Jennifer G. Dy, Miriam Leeser, James Goebel: Enabling a Real-Time Solution for Neuron Detection with Reconfigurable Hardware. IEEE International Workshop on Rapid System Prototyping 2005: 128-134
2004
41 Laurie A. Smith King, Miriam Leeser, Heather Quinn: Dynamo: A Runtime Partitioning System. ERSA 2004: 145-154
40EEMiriam Leeser, Shawn Miller, Haiqian Yu: Smart Camera Based on Reconfigurable Hardware Enables Diverse Real-Time Applications. FCCM 2004: 147-155
39EEWang Chen, Panos Kosmas, Miriam Leeser, Carey Rappaport: An FPGA implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm. FPGA 2004: 213-222
2003
38EEJuan Carlos Rojas, Miriam Leeser: Programming portable optimized multimedia applications. ACM Multimedia 2003: 291-294
37EEHeather Quinn, Laurie A. Smith King, Miriam Leeser, Waleed Meleis: Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines. FCCM 2003: 173-
2002
36EESrdjan Coric, Miriam Leeser, Eric Miller, Marc Trepanier: Parallel-beam backprojection: an FPGA implementation optimized for medical imaging. FPGA 2002: 217-226
35EEPavle Belanovic, Miriam Leeser: A Library of Parameterized Floating-Point Modules and Their Use. FPL 2002: 657-666
2001
34EEMike Estlick, Miriam Leeser, James Theiler, John J. Szymanski: Algorithmic transformations in the implementation of K- means clustering on reconfigurable hardware. FPGA 2001: 103-110
33 Laurie A. Smith King, Heather Quinn, Miriam Leeser, Demetris G. Galatopoullos, Elias S. Manolakos: Run-Time Execution of Reconfigurable Hardware in a Java Environment. ICCD 2001: 380-387
32EESilviu M. S. A. Chiricescu, Miriam Leeser, Mankuan Michael Vai: Design and analysis of a dynamically reconfigurable three-dimensional FPGA. IEEE Trans. VLSI Syst. 9(1): 186-196 (2001)
2000
31EEAli M. Shankiti, Miriam Leeser: Implementing a RAKE receiver for wireless communications on an FPGA-based computer system. FPGA 2000: 145-151
30EEYanbing Li, Miriam Leeser: HML, a novel hardware description language and its translation to VHDL. IEEE Trans. VLSI Syst. 8(1): 1-8 (2000)
29EEShantanu Tarafdar, Miriam Leeser: A data-centric approach to high-level synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1251-1267 (2000)
1998
28EEShantanu Tarafdar, Miriam Leeser: The DT-Model: High-Level Synthesis Using Data Transfers. DAC 1998: 114-117
27EEGoran Doncev, Miriam Leeser, Shantanu Tarafdar: High Level Synthesis for Designing Custom Computing Hardware. FCCM 1998: 326-328
26EEShantanu Tarafdar, Miriam Leeser, Zixin Yin: Integrating floorplanning in data-transfer based high-level synthesis. ICCAD 1998: 412-417
25EEGoran Doncev, Miriam Leeser, Shantanu Tarafdar: Truly Rapid Prototyping Requires High-Level Synthesis. International Workshop on Rapid System Prototyping 1998: 101-
24EEMiriam Leeser, Waleed Meleis, Mankuan Michael Vai, Silviu M. S. A. Chiricescu, Weidong Xu, Paul M. Zavracky: Rothko: A Three-Dimensional FPGA. IEEE Design & Test of Computers 15(1): 16-23 (1998)
1997
23EEPeter Soderquist, Miriam Leeser: Optimizing the Data Cache Performance of a Software MPEG-2 Video Decoder. ACM Multimedia 1997: 291-301
22EEWaleed Meleis, Miriam Leeser, Paul M. Zavracky, Mankuan Michael Vai: Architectural Design of a Three Dimensional FPGA. ARVLSI 1997: 256-269
21 Miriam Leeser, Waleed Meleis, Mankuan Michael Vai, Paul M. Zavracky: Rothko: A three dimensional FPGA architecture, its fabrication, and design tools. FPL 1997: 21-30
20 Peter Soderquist, Miriam Leeser: Memory Traffic and Data Cache Behavior of an MPEG-2 Software Decoder. ICCD 1997: 417-422
1996
19 Peter Soderquist, Miriam Leeser: Area and Performance Tradeoffs in Floating-Point Divide and Square-Root Implementations. ACM Comput. Surv. 28(3): 518-564 (1996)
1995
18EEMiriam Leeser, John W. O'Leary: Verification of a subtractive radix-2 square root algorithm and implementation. ICCD 1995: 526-531
17EEPeter Soderquist, Miriam Leeser: An Area/Performance Comparison of Subtractive and Multiplicative Divide/Square Root Implementations. IEEE Symposium on Computer Arithmetic 1995: 132-139
16 Andrés Takach, Wayne Wolf, Miriam Leeser: An Automaton Model for Scheduling Constraints in Synchronous Machines. IEEE Trans. Computers 44(1): 1-12 (1995)
15EEMark Aagaard, Miriam Leeser: Verifying a Logic-Synthesis Algorithm and Implementation: A Case Study in Software Verification. IEEE Trans. Software Eng. 21(10): 822-833 (1995)
1994
14EEMark H. Linderman, Miriam Leeser: Simulation of digital circuits in the presence of uncertainty. ICCAD 1994: 248-251
13 Mark Aagaard, Miriam Leeser: Reasoning About Pipelines with Structural Hazards. TPCD 1994: 13-32
12 John W. O'Leary, Miriam Leeser, Jason Hickey, Mark Aagaard: Non-Restoring Integer Square Root: A Case Study in Design by Principled Optimization. TPCD 1994: 52-71
11 Mark Aagaard, Miriam Leeser: A Methodology for Efficient Hardware Verification. Formal Methods in System Design 5(1/2): 95-117 (1994)
10EEMark Aagaard, Miriam Leeser: PBS: proven Boolean simplification. IEEE Trans. on CAD of Integrated Circuits and Systems 13(4): 459-470 (1994)
1993
9 John W. O'Leary, Mark H. Linderman, Miriam Leeser, Mark Aagaard: HML: A Hardware Description Language Based on Standard ML. CHDL 1993: 327-334
8 Mark Aagaard, Miriam Leeser, Phillip J. Windley: Toward a Super Duper Hardware Tactic. HUG 1993: 399-412
7 Mark Aagaard, Miriam Leeser: A Framework for Specifying and Designing Pipelines. ICCD 1993: 548-551
1992
6 Mark Aagaard, Miriam Leeser: Verifying a Logic Synthesis Tool in Nuprl: A Case Study in Software Verification. CAV 1992: 69-81
5 Mark Aagaard, Miriam Leeser: A Methodology for Reusable Hardware Proofs. TPHOLs 1992: 177-196
1991
4 Mark Aagaard, Miriam Leeser: A Formally Verified System for Logic Synthesis. ICCD 1991: 346-350
1990
3 Miriam Leeser, Geoffrey Brown: Hardware Specification, Verification and Synthesis: Mathematical Aspects, Mathematical Science Institute Workshop, Cornall University, Ithaca, New York, USA, July 5-7, 1989, Proceedings Springer 1990
1989
2 Geoffrey M. Brown, Miriam Leeser: From Programs to Transistors: Verifying Hardware Synthesis Tools. Hardware Specification, Verification and Synthesis 1989: 129-151
1EEMiriam Leeser: Reasoning about the function and timing of integrated circuits with interval temporal logic. IEEE Trans. on CAD of Integrated Circuits and Systems 8(12): 1233-1246 (1989)

Coauthor Index

1Mark Aagaard [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15]
2Pavle Belanovic [35]
3Sherman Braganza [48] [51]
4Geoffrey Brown [3]
5Geoffrey M. Brown [2]
6Wang Chen [39]
7Silviu M. S. A. Chiricescu [24] [32]
8Albert Conti [50]
9Ben Cordes [42] [43] [45]
10Srdjan Coric [36]
11Goran Doncev [25] [27]
12Jennifer G. Dy [42] [43]
13Mike Estlick [34]
14Demetris G. Galatopoullos [33]
15James Goebel [42] [43]
16Jason Hickey [12]
17Laurie A. Smith King [33] [37] [41] [50]
18Panos Kosmas [39]
19Yanbing Li [30]
20Mark H. Linderman [9] [14]
21Richard W. Linderman [45]
22Elias S. Manolakos [33]
23Waleed Meleis [21] [22] [24] [37]
24Eric Miller [36] [45]
25Shawn Miller [40]
26Nicholas Moore [50]
27Joshua Noseworthy [46] [49]
28John W. O'Leary [9] [12] [18]
29Heather Quinn [33] [37] [41]
30Carey Rappaport [39]
31Juan Carlos Rojas [38] [44]
32Ali M. Shankiti [31]
33Peter Soderquist [17] [19] [20] [23] [44]
34John J. Szymanski [34]
35Andrés Takach [16]
36Shantanu Tarafdar [25] [26] [27] [28] [29]
37James Theiler [34]
38Marc Trepanier [36]
39Mankuan Michael Vai [21] [22] [24] [32]
40Xiaojun Wang [48] [52]
41Phillip J. Windley [8]
42Wayne Wolf [16]
43Weidong Xu [24]
44Zixin Yin [26]
45Haiqian Yu [40] [47]
46Paul M. Zavracky [21] [22] [24]

Colors in the list of coauthors

Copyright © Wed May 28 02:56:03 2008 by Michael Ley (ley@uni-trier.de)