| |
| 2007 | ||
|---|---|---|
| 3 | EE | Jingbo Duan, Fule Li, Liyuan Liu, Dongmei Li, Yongming Li, Zhihua Wang: A Pipelined A/D Conversion Technique with Low INL and DNL. ISCAS 2007: 3391-3394 |
| 2 | EE | Fule Li, Zhihua Wang, Dongmei Li: An Incomplete Settling Technique for Pipelined Analog-to-Digital Converters. ISCAS 2007: 3590-3593 |
| 2006 | ||
| 1 | EE | Shuaiqi Wang, Fule Li, Yasuaki Inoue: A 15-bit 10-Msample/s Pipelined A/D Converter Based on Incomplete Settling Principle. IEICE Transactions 89-A(10): 2732-2739 (2006) |
| 1 | Jingbo Duan | [3] |
| 2 | Yasuaki Inoue | [1] |
| 3 | Dongmei Li | [2] [3] |
| 4 | Yongming Li | [3] |
| 5 | Liyuan Liu | [3] |
| 6 | Shuaiqi Wang | [1] |
| 7 | Zhihua Wang | [2] [3] |