| 2008 |
|---|
| 154 | EE | David B. Thomas,
Wayne Luk:
FPGA-optimised high-quality uniform random number generators.
FPGA 2008: 235-244 |
| 153 | EE | Terrence S. T. Mak,
N. Pete Sedcole,
Peter Y. K. Cheung,
Wayne Luk:
High-throughput interconnect wave-pipelining for global communication in FPGAs.
FPGA 2008: 258 |
| 152 | EE | Terrence S. T. Mak,
Crescenzo D'Alessandro,
N. Pete Sedcole,
Peter Y. K. Cheung,
Alex Yakovlev,
Wayne Luk:
Implementation of Wave-Pipelined Interconnects in FPGAs.
NOCS 2008: 213-214 |
| 151 | EE | Terrence S. T. Mak,
N. Pete Sedcole,
Peter Y. K. Cheung,
Wayne Luk:
Interconnection lengths and delays estimation for communication links in FPGAs.
SLIP 2008: 1-10 |
| 150 | EE | Terrence S. T. Mak,
Crescenzo D'Alessandro,
N. Pete Sedcole,
Peter Y. K. Cheung,
Alexandre Yakovlev,
Wayne Luk:
Global interconnections in FPGAs: modeling and performance analysis.
SLIP 2008: 51-58 |
| 149 | EE | Sherif Yusuf,
Wayne Luk,
Morris Sloman,
Naranker Dulay,
Emil C. Lupu,
Geoffrey Brown:
Reconfigurable Architecture for Network Flow Analysis.
IEEE Trans. VLSI Syst. 16(1): 57-65 (2008) |
| 148 | EE | Kubilay Atasu,
Can C. Özturan,
Günhan Dündar,
Oskar Mencer,
Wayne Luk:
CHIPS: Custom Hardware Instruction Processor Synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 528-541 (2008) |
| 2007 |
|---|
| 147 | EE | David B. Thomas,
Wayne Luk,
Michael Stumpf:
Reconfigurable Hardware Acceleration of Canonical Graph Labelling.
ARC 2007: 302-313 |
| 146 | EE | David B. Thomas,
Jacob A. Bower,
Wayne Luk:
Automatic Generation and Optimisation of Reconfigurable Financial Monte-Carlo Simulations.
ASAP 2007: 168-173 |
| 145 | EE | Ben Cope,
Peter Y. K. Cheung,
Wayne Luk:
Bridging the Gap between FPGAs and Multi-Processor Architectures: A Video Processing Perspective.
ASAP 2007: 308-313 |
| 144 | EE | Kubilay Atasu,
Robert G. Dimond,
Oskar Mencer,
Wayne Luk,
Can C. Özturan,
Günhan Dündar:
Optimizing instruction-set extensible processors under data bandwidth constraints.
DATE 2007: 588-593 |
| 143 | EE | Steven J. E. Wilton,
Chun Hok Ho,
Philip Heng Wai Leong,
Wayne Luk,
Bradley R. Quinton:
A synthesizable datapath-oriented embedded FPGA fabric.
FPGA 2007: 33-41 |
| 142 | EE | Terrence S. T. Mak,
N. Pete Sedcole,
Peter Y. K. Cheung,
Wayne Luk,
K. P. Lam:
A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing.
NOCS 2007: 173-182 |
| 141 | EE | David B. Thomas,
Wayne Luk,
Philip Heng Wai Leong,
John D. Villasenor:
Gaussian random number generators.
ACM Comput. Surv. 39(4): (2007) |
| 140 | EE | Tero Rissa,
Adam Donlin,
Wayne Luk:
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems
CoRR abs/0710.4845: (2007) |
| 139 | EE | Ray C. C. Cheung,
Dong-U Lee,
Wayne Luk,
John D. Villasenor:
Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method.
IEEE Trans. VLSI Syst. 15(8): 952-962 (2007) |
| 138 | EE | N. Pete Sedcole,
Peter Y. K. Cheung,
George A. Constantinides,
Wayne Luk:
Run-Time Integration of Reconfigurable Video Processing Systems.
IEEE Trans. VLSI Syst. 15(9): 1003-1016 (2007) |
| 137 | EE | José Gabriel F. Coutinho,
M. P. T. Juvonen,
J. L. Wang,
B. L. Lo,
Wayne Luk,
Oskar Mencer,
G. Z. Yang:
Designing a Posture Analysis System with Hardware Implementation.
VLSI Signal Processing 47(1): 33-45 (2007) |
| 136 | EE | David B. Thomas,
Wayne Luk:
High Quality Uniform Random Number Generation Using LUT Optimised State-transition Matrices.
VLSI Signal Processing 47(1): 77-92 (2007) |
| 2006 |
|---|
| 135 | EE | Su-Shin Ang,
George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms.
ARC 2006: 205-216 |
| 134 | EE | Sherif Yusuf,
Wayne Luk,
M. K. N. Szeto,
W. Osborne:
UNITE: Uniform Hardware-Based Network Intrusion deTection Engine.
ARC 2006: 389-400 |
| 133 | EE | Arran Derbyshire,
Tobias Becker,
Wayne Luk:
Incremental elaboration for run-time reconfigurable hardware designs.
CASES 2006: 93-102 |
| 132 | EE | Robert G. Dimond,
Oskar Mencer,
Wayne Luk:
Automating processor customisation: optimised memory access and resource sharing.
DATE 2006: 206-211 |
| 131 | | Chun Hok Ho,
Ka Fai Cedric Yiu,
Jiaquan Huo,
Sven Nordholm,
Wayne Luk:
Reconfigurable Acceleration of Robust Frequency-Domain Echo Cancellation.
ERSA 2006: 184-190 |
| 130 | EE | Robert G. Dimond,
Oskar Mencer,
Wayne Luk:
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA.
FCCM 2006: 175-184 |
| 129 | EE | Oliver Pell,
Wayne Luk:
Generating Parametrised Hardware Libraries from Higher-Order Descriptions.
FCCM 2006: 297-298 |
| 128 | EE | Chun Hok Ho,
Philip Heng Wai Leong,
Wayne Luk,
Steven J. E. Wilton,
S. Lopez-Buedo:
Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs.
FCCM 2006: 35-44 |
| 127 | EE | David B. Thomas,
Wayne Luk:
Efficient Hardware Generation of Random Variates with Arbitrary Distributions.
FCCM 2006: 57-66 |
| 126 | EE | Andreas Fidjeland,
Wayne Luk:
Archlog: High-Level Synthesis of Reconfigurable Multiprocessors for Logic Programming.
FPL 2006: 1-6 |
| 125 | EE | Oliver Pell,
Wayne Luk:
Compiling Higher-Order Polymorphic Hardware Descriptions Into Parametrised VHDL Libraries with Flexible Placement Information.
FPL 2006: 1-6 |
| 124 | EE | Suhaib A. Fahmy,
Christos-Savvas Bouganis,
Peter Y. K. Cheung,
Wayne Luk:
Efficient Realtime FPGA Implementation of the Trace Transform.
FPL 2006: 1-6 |
| 123 | EE | David B. Thomas,
Wayne Luk:
Non-Uniform Random Number Generation Through Piecewise Linear Approximations.
FPL 2006: 1-6 |
| 122 | EE | Terrence S. T. Mak,
N. Pete Sedcole,
Peter Y. K. Cheung,
Wayne Luk:
On-FPGA Communication Architectures and Design Factors.
FPL 2006: 1-8 |
| 121 | EE | N. Pete Sedcole,
Peter Y. K. Cheung,
George A. Constantinides,
Wayne Luk:
On-Chip Communication in Run-Time Assembled Reconfigurable Systems.
ICSAMOS 2006: 168-176 |
| 120 | EE | Steve McKeever,
Wayne Luk:
Provably-correct hardware compilation tools based on pass separation techniques.
Formal Asp. Comput. 18(2): 120-142 (2006) |
| 119 | EE | Dong-U Lee,
John D. Villasenor,
Wayne Luk,
Philip Heng Wai Leong:
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis.
IEEE Trans. Computers 55(6): 659-671 (2006) |
| 118 | EE | Dong-U Lee,
Altaf Abdul Gaffar,
Ray C. C. Cheung,
Oskar Mencer,
Wayne Luk,
George A. Constantinides:
Accuracy-Guaranteed Bit-Width Optimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1990-2000 (2006) |
| 117 | EE | Jacob A. Bower,
Wayne Luk,
Oskar Mencer,
Michael J. Flynn,
Martin Morf:
Dynamic clock-frequencies for FPGAs.
Microprocessors and Microsystems 30(6): 388-397 (2006) |
| 2005 |
|---|
| 116 | EE | Andreas Fidjeland,
Wayne Luk:
Customising Application-Speci.c Multiprocessor Systems: a Case Study.
ASAP 2005: 239-246 |
| 115 | EE | Ray C. C. Cheung,
Dong-U Lee,
Oskar Mencer,
Wayne Luk,
Peter Y. K. Cheung:
Automating custom-precision function evaluation for embedded processors.
CASES 2005: 22-31 |
| 114 | EE | Oliver Pell,
Wayne Luk:
Resolving Quartz Overloading.
CHARME 2005: 380-383 |
| 113 | EE | Dong-U Lee,
Altaf Abdul Gaffar,
Oskar Mencer,
Wayne Luk:
MiniBit: bit-width optimization via affine arithmetic.
DAC 2005: 837-840 |
| 112 | EE | Ray C. C. Cheung,
Wayne Luk,
Peter Y. K. Cheung:
Reconfigurable Elliptic Curve Cryptosystems on a Chip.
DATE 2005: 24-29 |
| 111 | EE | Suhaib A. Fahmy,
Peter Y. K. Cheung,
Wayne Luk:
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection.
DATE 2005: 8-13 |
| 110 | | Wayne Luk,
Sherif Yusuf,
Morris Sloman,
Geoffrey Brown,
Emil C. Lupu,
Naranker Dulay:
A Combined Hardware-Software Architecture for Network Flow.
ERSA 2005: 149-155 |
| 109 | | Wim J. C. Melis,
Kieron Turkington,
Alexander Whitton,
Wayne Luk,
Peter Y. K. Cheung,
Paul Metzgen:
Cell Based Motion Estimators for Reconfigurable Platforms.
ERSA 2005: 218-224 |
| 108 | EE | José Gabriel F. Coutinho,
Jun Jiang,
Wayne Luk:
Interleaving Behavioral and Cycle-Accurate Descriptions for Reconfigurable Hardware Compilation.
FCCM 2005: 245-254 |
| 107 | EE | Paul Baker,
Tim Todman,
Henry Styles,
Wayne Luk:
Reconfigurable Designs for Radiosity.
FCCM 2005: 95-104 |
| 106 | | Robert G. Dimond,
Oskar Mencer,
Wayne Luk:
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools.
FPL 2005: 1-6 |
| 105 | | Suhaib A. Fahmy,
Peter Y. K. Cheung,
Wayne Luk:
Novel FPGA-Based Implementation of Median and Weighted Median Filters for Image Processing.
FPL 2005: 142-147 |
| 104 | | Guanglie Zhang,
Philip Heng Wai Leong,
Dong-U Lee,
John D. Villasenor,
Ray C. C. Cheung,
Wayne Luk:
Ziggurat-based Hardware Gaussian Random Number Generator.
FPL 2005: 275-280 |
| 103 | | Henry Styles,
Wayne Luk:
Compilation and Management of Phase-Optimized Reconfigurable Systems.
FPL 2005: 311-316 |
| 102 | | Sherif Yusuf,
Wayne Luk:
Bitwise Optimised CAM for Network Intrusion Detection Systems.
FPL 2005: 444-449 |
| 101 | | Ben Cope,
Peter Y. K. Cheung,
Wayne Luk,
Sarah Witt:
Have GPUs Made FPGAs Redundant in the Field of Video Processing?
FPT 2005: 111-118 |
| 100 | | C. T. Chow,
L. S. M. Tsui,
Philip Heng Wai Leong,
Wayne Luk,
Steven J. E. Wilton:
Dynamic Voltage Scaling for Commercial FPGAs.
FPT 2005: 173-180 |
| 99 | | G. L. Zhang,
Philip Heng Wai Leong,
Chun Hok Ho,
Kuen Hung Tsoi,
C. C. C. Cheung,
Dong-U Lee,
Ray C. C. Cheung,
Wayne Luk:
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation.
FPT 2005: 215-222 |
| 98 | | Andreas Fidjeland,
Wayne Luk:
An Overview of High-Level Synthesis of Multiprocessors for Logic Programming.
FPT 2005: 333-334 |
| 97 | | David B. Thomas,
Wayne Luk:
High Quality Uniform Random Number Generation Through LUT Optimised Linear Recurrences.
FPT 2005: 61-68 |
| 96 | | M. P. T. Juvonen,
José Gabriel F. Coutinho,
J. L. Wang,
B. L. Lo,
Wayne Luk,
Oskar Mencer,
G. Z. Yang:
Custom Hardware Architectures for Posture Analysis.
FPT 2005: 77-84 |
| 95 | EE | Dong-U Lee,
Altaf Abdul Gaffar,
Oskar Mencer,
Wayne Luk:
Optimizing Hardware Function Evaluation.
IEEE Trans. Computers 54(12): 1520-1531 (2005) |
| 94 | EE | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Optimum and heuristic synthesis of multiple word-length architectures.
IEEE Trans. VLSI Syst. 13(1): 39-57 (2005) |
| 93 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Guanglie Zhang,
Philip Heng Wai Leong:
A hardware Gaussian noise generator using the Wallace method.
IEEE Trans. VLSI Syst. 13(8): 911-920 (2005) |
| 92 | EE | Ray C. C. Cheung,
N. J. Telle,
Wayne Luk,
Peter Y. K. Cheung:
Customizable elliptic curve cryptosystems.
IEEE Trans. VLSI Syst. 13(9): 1048-1059 (2005) |
| 91 | EE | Tim Todman,
José Gabriel F. Coutinho,
Wayne Luk:
Customisable Hardware Compilation.
The Journal of Supercomputing 32(2): 119-137 (2005) |
| 2004 |
|---|
| 90 | EE | Tero Rissa,
Adam Donlin,
Wayne Luk:
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems.
DATE 2004: 253-258 |
| 89 | EE | Tero Rissa,
Adam Donlin,
Wayne Luk:
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems.
DATE 2004: 253-258 |
| 88 | | Tim Todman,
José Gabriel F. Coutinho,
Wayne Luk:
Customisable Hardware Compilation.
ERSA 2004: 18-28 |
| 87 | | Tero Rissa,
Wayne Luk,
Peter Y. K. Cheung:
Distinguished Paper: Automated Combination of Simulation and Hardware Prototyping.
ERSA 2004: 184-193 |
| 86 | EE | Dong-U Lee,
Wayne Luk,
Connie Wang,
Christopher Jones,
Michael Smith,
John D. Villasenor:
A Flexible Hardware Encoder for Low-Density Parity-Check Codes.
FCCM 2004: 101-111 |
| 85 | EE | N. Pete Sedcole,
Peter Y. K. Cheung,
George A. Constantinides,
Wayne Luk:
A Structured System Methodology for FPGA Based System-on-A-Chip Design.
FCCM 2004: 271-272 |
| 84 | EE | Altaf Abdul Gaffar,
Oskar Mencer,
Wayne Luk,
Peter Y. K. Cheung:
Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs.
FCCM 2004: 79-88 |
| 83 | EE | N. Pete Sedcole,
Peter Y. K. Cheung,
George A. Constantinides,
Wayne Luk:
A Structured Methodology for System-on-an-FPGA Design.
FPL 2004: 1047-1051 |
| 82 | EE | David B. Thomas,
Wayne Luk:
Implementing Graphics Shaders Using FPGAs.
FPL 2004: 1173 |
| 81 | EE | Dong-U Lee,
Oskar Mencer,
David J. Pearce,
Wayne Luk:
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs.
FPL 2004: 364-373 |
| 80 | EE | Tero Rissa,
Peter Y. K. Cheung,
Wayne Luk:
SoftSONIC: A Customisable Modular Platform for Video Applications.
FPL 2004: 54-63 |
| 79 | EE | Tim Todman,
Wayne Luk:
Methods and Tools for High-Resolution Imaging.
FPL 2004: 627-636 |
| 78 | EE | Steven J. E. Wilton,
Su-Shin Ang,
Wayne Luk:
The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays.
FPL 2004: 719-728 |
| 77 | | Wim J. C. Melis,
Peter Y. K. Cheung,
Wayne Luk:
Autonomous Memory Block for reconfigurable computing.
ISCAS (2) 2004: 581-584 |
| 76 | EE | Nicolas Telle,
Wayne Luk,
Ray C. C. Cheung:
Customising Hardware Designs for Elliptic Curve Cryptography.
SAMOS 2004: 274-283 |
| 75 | EE | Wayne Luk:
Customising Processors: Design-Time and Run-Time Opportunities.
SAMOS 2004: 49-58 |
| 74 | EE | Henry Styles,
Wayne Luk:
Exploiting Program Branch Probabilities in Hardware Compilation.
IEEE Trans. Computers 53(11): 1408-1419 (2004) |
| 73 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Peter Y. K. Cheung:
A Gaussian Noise Generator for Hardware-Based Simulations.
IEEE Trans. Computers 53(12): 1523-1534 (2004) |
| 2003 |
|---|
| 72 | | Per Haglund,
Oskar Mencer,
Wayne Luk,
Benjamin Tai:
PyHDL: Hardware Scripting with Python.
Engineering of Reconfigurable Systems and Algorithms 2003: 288-291 |
| 71 | EE | Tim Todman,
Wayne Luk:
Real-time Extensions to a C-like Hardware Description Language.
FCCM 2003: 302-304 |
| 70 | EE | T. K. Lee,
Sherif Yusuf,
Wayne Luk,
Morris Sloman,
Emil Lupu,
Naranker Dulay:
Compiling Policy Descriptions into Reconfigurable Firewall Processors.
FCCM 2003: 39- |
| 69 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Peter Y. K. Cheung:
A Hardware Gaussian Noise Generator for Channel Code Evaluation.
FCCM 2003: 69- |
| 68 | EE | Per Haglund,
Oskar Mencer,
Wayne Luk,
Benjamin Tai:
Hardware Design with a Scripting Language.
FPL 2003: 1040-1043 |
| 67 | EE | Jun Jiang,
Wayne Luk,
Daniel Rueckert:
FPGA-Based Computation of Free-Form Deformations.
FPL 2003: 1057-1061 |
| 66 | EE | Theerayod Wiangtong,
Peter Y. K. Cheung,
Wayne Luk:
Cluster-Driven Hardware/Software Partitioning and Scheduling Approach for a Reconfigurable Computer System.
FPL 2003: 1071-1074 |
| 65 | EE | Henry Styles,
Wayne Luk:
Branch Optimisation Techniques for Hardware Compilation.
FPL 2003: 324-333 |
| 64 | EE | Theerayod Wiangtong,
Peter Y. K. Cheung,
Wayne Luk:
A Unified Codesign Run-Time Environment for the UltraSONIC Reconfigurable Computer.
FPL 2003: 396-405 |
| 63 | EE | N. Pete Sedcole,
Peter Y. K. Cheung,
George A. Constantinides,
Wayne Luk:
A Reconfigurable Platform for Real-Time Embedded Video Image Processing.
FPL 2003: 606-615 |
| 62 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Peter Y. K. Cheung:
Non-uniform Segmentation for Hardware Function Evaluation.
FPL 2003: 796-807 |
| 61 | EE | T. K. Lee,
Sherif Yusuf,
Wayne Luk,
Morris Sloman,
Emil Lupu,
Naranker Dulay:
Irregular Reconfigurable CAM Structures for Firewall Applications.
FPL 2003: 890-899 |
| 60 | EE | Steve McKeever,
Wayne Luk,
Arran Derbyshire:
Towards Verifying Parametrised Hardware Libraries with Relative Placement Information.
HICSS 2003: 279 |
| 59 | EE | Tim Todman,
Wayne Luk:
Combining Imperative and Declarative Hardware Descriptions.
HICSS 2003: 280 |
| 58 | EE | Theerayod Wiangtong,
Peter Y. K. Cheung,
Wayne Luk:
Multitasking in hardware-software codesign for reconfigurable computer.
ISCAS (5) 2003: 621-624 |
| 57 | EE | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Synthesis of saturation arithmetic architectures.
ACM Trans. Design Autom. Electr. Syst. 8(3): 334-354 (2003) |
| 56 | EE | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Wordlength optimization for linear digital signal processing.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1432-1442 (2003) |
| 2002 |
|---|
| 55 | EE | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Optimum Wordlength Allocation.
FCCM 2002: 219-228 |
| 54 | EE | Henry Styles,
Wayne Luk:
Accelerating Radiosity Calculations Using Reconfigurable Platforms.
FCCM 2002: 279-281 |
| 53 | EE | Theerayod Wiangtong,
Peter Y. K. Cheung,
Wayne Luk:
Tabu Search with Intensification Strategy for Functional Partitioning in Hardware-Software Codesign.
FCCM 2002: 297-298 |
| 52 | EE | Wim J. C. Melis,
Peter Y. K. Cheung,
Wayne Luk:
Image Registration of Real-Time Video Data Using the SONIC Reconfigurable Computer Platform.
FCCM 2002: 3-12 |
| 51 | EE | Altaf Abdul Gaffar,
Wayne Luk,
Peter Y. K. Cheung,
Nabeel Shirazi:
Customising Floating-Point Designs.
FCCM 2002: 315-317 |
| 50 | EE | Jörn Gause,
Peter Y. K. Cheung,
Wayne Luk:
Reconfigurable Shape-Adaptive Template Matching Architectures.
FCCM 2002: 98- |
| 49 | EE | Steve McKeever,
Wayne Luk,
Arran Derbyshire:
Compiling Hardware Descriptions with Relative Placement Information for Parametrised Libraries.
FMCAD 2002: 342-359 |
| 48 | EE | Wim J. C. Melis,
Peter Y. K. Cheung,
Wayne Luk:
Image Registration of Real-Time Broadcast Video Using the UltraSONIC Reconfigurable Computer.
FPL 2002: 1148-1151 |
| 47 | EE | Altaf Abdul Gaffar,
Wayne Luk,
Peter Y. K. Cheung,
Nabeel Shirazi,
James Hwang:
Automating Customisation of Floating-Point Designs.
FPL 2002: 523-533 |
| 46 | EE | Shay Ping Seng,
Wayne Luk,
Peter Y. K. Cheung:
Run-Time Adaptive Flexible Instruction Processors.
FPL 2002: 545-555 |
| 2001 |
|---|
| 45 | EE | Steve McKeever,
Wayne Luk:
Towards Provably-Correct Hardware Compilation Tools Based on Pass Separation Techniques.
CHARME 2001: 212-227 |
| 44 | EE | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Heuristic datapath allocation for multiple wordlength systems.
DATE 2001: 791-797 |
| 43 | EE | Markus Weinhardt,
Wayne Luk:
Task-Parallel Programming of Reconfigurable Systems.
FPL 2001: 172-181 |
| 42 | EE | Oskar Mencer,
Nicolas Boullis,
Wayne Luk,
Henry Styles:
Parameterized Function Evaluation for FPGAs.
FPL 2001: 544-554 |
| 41 | EE | Chakkapas Visavakul,
Peter Y. K. Cheung,
Wayne Luk:
A Digit-Serial Structure for Reconfigurable Multipliers.
FPL 2001: 565-573 |
| 40 | EE | Markus Weinhardt,
Wayne Luk:
Pipeline vectorization.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(2): 234-248 (2001) |
| 2000 |
|---|
| 39 | EE | Shay Ping Seng,
Wayne Luk,
Peter Y. K. Cheung:
Flexible instruction processors.
CASES 2000: 193-200 |
| 38 | EE | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Multiple Precision for Resource Minimization.
FCCM 2000: 307-308 |
| 37 | EE | Markus Weinhardt,
Wayne Luk:
Evaluating Hardware Compilation Techniques.
FCCM 2000: 333-334 |
| 36 | EE | Arran Derbyshire,
Wayne Luk:
Combining Serialization and Reconfiguration for Convolver Designs.
FCCM 2000: 344-346 |
| 35 | EE | Henry Styles,
Wayne Luk:
Customizing Graphics Applications: Techniques and Programming Interface.
FCCM 2000: 77-90 |
| 34 | EE | Xue-Jie Zhang,
Kam-Wing Ng,
Wayne Luk:
A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems.
FPL 2000: 361-370 |
| 33 | EE | Arran Derbyshire,
Wayne Luk:
Combining Serialisation and Reconfiguration for FPGA Designs.
FPL 2000: 636-645 |
| 32 | EE | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Multiple-Wordlength Resource Binding.
FPL 2000: 646-655 |
| 31 | EE | Jörn Gause,
Peter Y. K. Cheung,
Wayne Luk:
Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive DCT.
FPL 2000: 96-105 |
| 30 | | Simon D. Haynes,
John Stone,
Peter Y. K. Cheung,
Wayne Luk:
Video Image Processing with the Sonic Architecture.
IEEE Computer 33(4): 50-57 (2000) |
| 1999 |
|---|
| 29 | EE | Wayne Luk,
T. K. Lee,
J. Rice,
Nabeel Shirazi,
Peter Y. K. Cheung:
Reconfigurable Computing for Augmented Reality.
FCCM 1999: 136-145 |
| 28 | EE | Dan Benyamin,
John D. Villasenor,
Wayne Luk:
Optimizing FPGA-Based Vector Product Designs.
FCCM 1999: 188- |
| 27 | EE | Simon D. Haynes,
Peter Y. K. Cheung,
Wayne Luk,
John Stone:
SONIC - A Plug-In Architecture for Video Processing.
FCCM 1999: 280-281 |
| 26 | EE | Markus Weinhardt,
Wayne Luk:
Pipeline Vectorization for Reconfigurable Systems.
FCCM 1999: 52-62 |
| 25 | EE | Florent de Dinechin,
Wayne Luk,
Steve McKeever:
Towards Adaptable Hierarchical Placement for FPGAs.
FPGA 1999: 254 |
| 24 | | Wayne Luk,
Arran Derbyshire,
Shaori Guo,
D. Siganos:
Serial Hardware Libraries for Reconfigurable Designs.
FPL 1999: 185-194 |
| 23 | | Simon D. Haynes,
Peter Y. K. Cheung,
Wayne Luk,
John Stone:
SONIC - A Plug-In Architecture for Video Processing.
FPL 1999: 21-30 |
| 22 | | Nabeel Shirazi,
Wayne Luk,
Dan Benyamin,
Peter Y. K. Cheung:
Quantitative Analysis of Run-Time Reconfigurable Database Search.
FPL 1999: 253-263 |
| 21 | | George A. Constantinides,
Peter Y. K. Cheung,
Wayne Luk:
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs.
FPL 1999: 323-332 |
| 20 | | Markus Weinhardt,
Wayne Luk:
Memory Access Optimization and RAM Inference for Pipeline Vectorization.
FPL 1999: 61-70 |
| 1998 |
|---|
| 19 | EE | Nabeel Shirazi,
Wayne Luk,
Peter Y. K. Cheung:
Automating Production of Run-Time Reconfigurable Designs.
FCCM 1998: 147- |
| 18 | EE | Wayne Luk,
P. Andreou,
Arran Derbyshire,
F. Dupont-De-Dinechin,
J. Rice,
Nabeel Shirazi,
D. Siganos:
A Reconfigurable Engine for Real-Time Video Processing.
FPL 1998: 169-178 |
| 17 | EE | Nabeel Shirazi,
Wayne Luk,
Peter Y. K. Cheung:
Run-Time Management of Dynamically Recongigurable Designs.
FPL 1998: 59-68 |
| 16 | EE | Wayne Luk,
Steve McKeever:
Pebble: A Language for Parametrised and Reconfigurable Hardware Design.
FPL 1998: 9-18 |
| 1997 |
|---|
| 15 | | Wayne Luk,
Peter Y. K. Cheung,
Manfred Glesner:
Field-Programmable Logic and Applications, 7th International Workshop, FPL '97, London, UK, September 1-3, 1997, Proceedings
Springer 1997 |
| 14 | EE | Wayne Luk,
Nabeel Shirazi,
Peter Y. K. Cheung:
Compilation tools for run-time reconfigurable designs.
FCCM 1997: 56-65 |
| 13 | | Wayne Luk,
Nabeel Shirazi,
Shaori Guo,
Peter Y. K. Cheung:
Pipeline morphing and virtual pipelines.
FPL 1997: 111-120 |
| 12 | | Anjit Sekhar Chaudhuri,
Peter Y. K. Cheung,
Wayne Luk:
A reconfigurable data-localised array for morphological algorithms.
FPL 1997: 344-353 |
| 11 | | Patrick I. Mackinlay,
Peter Y. K. Cheung,
Wayne Luk,
Richard Sandiford:
Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research.
FPL 1997: 91-100 |
| 10 | | John O'Leary,
Geoffrey Brown,
Wayne Luk:
Verified Compilation of Communicating Processes into Clocked Circuits.
Formal Asp. Comput. 9(5-6): 537-559 (1997) |
| 1996 |
|---|
| 9 | | Wayne Luk,
Shaori Guo,
Nabeel Shirazi,
N. Zhuang:
A Framework for Developing Parameterised FPGA Libraries.
FPL 1996: 24-33 |
| 8 | | Geoffrey Brown,
Wayne Luk,
John O'Leary:
Retargeting a Hardware Compiler Using Protokol Converters.
Formal Asp. Comput. 8(2): 209-237 (1996) |
| 1995 |
|---|
| 7 | | Will Moore,
Wayne Luk:
Field-Programmable Logic and Applications, 5th International Workshop, FPL '95, Oxford, UK, August 29 - September 1, 1995, Proceedings
Springer 1995 |
| 6 | | Adrian Lawrence,
Andrew Kay,
Wayne Luk,
Toshio Nomura,
Ian Page:
Using Reconfigurable Hardware to Speed up Product Development and Performance.
FPL 1995: 111-118 |
| 5 | | Shaori Guo,
Wayne Luk:
Compiling Ruby into FPGAs.
FPL 1995: 188-197 |
| 1994 |
|---|
| 4 | EE | Wayne Luk,
Teddy Wu:
Towards a declarative framework for hardware-software codesign.
CODES 1994: 181-188 |
| 3 | | Mat Newman,
Wayne Luk,
Ian Page:
Constraint-based Hierarchical Placement of Parallel Programs.
FPL 1994: 220-229 |
| 2 | | Shaori Guo,
Wayne Luk,
Penelope Probert:
Developing Parallel Architectures for Range and Image Sensors.
ICRA 1994: 2205-2210 |
| 1990 |
|---|
| 1 | | Wayne Luk,
Geoffrey Brown:
A Systolic LRU Processor and Its Top-Down Development.
Sci. Comput. Program. 15(2-3): 217-233 (1990) |
