Jose Manuel Mendias

José M. Mendías

2008
50	EE	Alexandros Bartzas, Miguel Peon-Quiros, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information. ASP-DAC 2008: 434-439
2007
49	EE	Salvatore Carta, Andrea Acquaviva, Pablo Garcia Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias: Multi-processor operating system emulation framework with thermal feedback for systems-on-chip. ACM Great Lakes Symposium on VLSI 2007: 311-316
48	EE	María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida: Area optimization of multi-cycle operators in high-level synthesis. DATE 2007: 449-454
47	EE	Miguel Peon-Quiros, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption. PATMOS 2007: 373-383
46	EE	David Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida: HW-SW emulation framework for temperature-aware design in MPSoCs. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
45	EE	Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis CoRR abs/0710.4801: (2007)
44	EE	Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias: Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1589-1601 (2007)
2006
43	EE	David Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias: A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip. DAC 2006: 618-623
42	EE	Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Pre-synthesis optimization of multiplications to improve circuit performance. DATE 2006: 1306-1311
41	EE	Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems. DATE 2006: 874-875
40	EE	Pablo Garcia Del Valle, David Atienza, Ivan Magan, Javier Garcia Flores, Esther Andres Perez, Jose Manuel Mendias, Luca Benini, Giovanni De Micheli: A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework. VLSI-SoC 2006: 140-145
39	EE	David Atienza, Jose Manuel Mendias, Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor: Systematic dynamic memory management design methodology for reduced memory footprint. ACM Trans. Design Autom. Electr. Syst. 11(2): 465-489 (2006)
38	EE	María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida: Bitwise scheduling to balance the computational cost of behavioral specifications. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 31-46 (2006)
37	EE	David Atienza, Stylianos Mamagkakis, Francesco Poletti, Jose Manuel Mendias, Francky Catthoor, Luca Benini, Dimitrios Soudris: Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems. Integration 39(2): 113-130 (2006)
2005
36	EE	Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Arrival time aware scheduling to minimize clock cycle length. ASP-DAC 2005: 1018-1021
35	EE	Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis. DATE 2005: 1252-1257
34	EE	Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor: A Complete Network-On-Chip Emulation Framework. DATE 2005: 246-251
33		Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida: Performance-driven read-after-write dependencies softening in high-level synthesis. ICCAD 2005: 7-12
32	EE	Nicolas Genko, David Atienza, Giovanni De Micheli, Luca Benini, Jose Manuel Mendias, Román Hermida, Francky Catthoor: A novel approach for network on chip emulation. ISCAS (3) 2005: 2365-2368
31		J. B. Pérez-Ramas, David Atienza, M. Peón, Ivan Magan, Jose Manuel Mendias, Román Hermida: Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip Interconnections Designs. PARCO 2005: 769-776
30	EE	José Manuel Velasco, David Atienza, Katzalin Olcoz, Francky Catthoor, Francisco Tirado, Jose Manuel Mendias: Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems. PATMOS 2005: 69-78
29	EE	Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, José M. Mendías, Antonios Thanailakis: Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications. WWIC 2005: 354-364
2004
28	EE	Francesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias: An integrated hardware/software approach for run-time scratchpad management. DAC 2004: 238-243
27	EE	David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications. DATE 2004: 532-537
26	EE	María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida: Behavioural Bitwise Scheduling Based on Computational Effort Balancing. DATE 2004: 684-685
25		David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Reducing memory accesses with a system-level design methodology in customized dynamic memory management. ESTImedia 2004: 93-98
24		David Atienza, Marc Leeman, Francky Catthoor, Geert Deconinck, Jose Manuel Mendias, Vincenzo De Florio, Rudy Lauwereins: Fast prototyping and refinement of complex dynamic data types in multimedia applications for consumer embedded devices. ICME 2004: 803-806
23	EE	María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida: Behavioural Scheduling to Balance the Bit-Level Computational Effort. ISVLSI 2004: 99-104
22	EE	José Manuel Velasco, David Atienza, Francky Catthoor, Francisco Tirado, Katzalin Olcoz, Jose Manuel Mendias: Garbage Collector Refinement for New Dynamic Multimedia Applications on Embedded Systems. Interaction between Compilers and Computer Architectures 2004: 25-32
21	EE	David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems. PATMOS 2004: 510-520
20	EE	Stylianos Mamagkakis, Alexandros Mpartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias, Antonios Thanailakis: Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology. WWIC 2004: 26-37
19		Edgar G. Daylight, David Atienza, Arnout Vandecappelle, Francky Catthoor, José M. Mendías: Memory-access-aware data structure transformations for embedded software with dynamic data accesses. IEEE Trans. VLSI Syst. 12(3): 269-280 (2004)
2003
18	EE	María C. Molina, José M. Mendías, Román Hermida: High-Level Allocation to Minimize Internal Hardware Wastage. DATE 2003: 10264-10269
17	EE	Marc Leeman, David Atienza, Francky Catthoor, Vincenzo De Florio, Geert Deconinck, Jose Manuel Mendias, Rudy Lauwereins: Power Estimation Approach of Dynamic Data Storage on a Hardware Software Boundary Level. PATMOS 2003: 289-298
16	EE	María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida: Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis. PATMOS 2003: 617-627
15	EE	María C. Molina, José M. Mendías, Román Hermida: Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources. Journal of Systems Architecture 49(12-15): 505-519 (2003)
2002
14	EE	María C. Molina, José M. Mendías, Román Hermida: High-level synthesis of multiple-precision circuitsindependent of data-objects length. DAC 2002: 612-615
13	EE	Olga Peñalba, José M. Mendías, Román Hermida: Maximizing Conditonal Reuse by Pre-Synthesis Transformations. DATE 2002: 1097
12	EE	María C. Molina, José M. Mendías, Román Hermida: Multiple-Precision Circuits Allocation Independent of Data-Objects Length. DATE 2002: 909-915
11	EE	Aitor Ibarra, José M. Mendías, Juan Lanchares, José Ignacio Hidalgo, Román Hermida: Optimization of Equational Specifications Using Genetic Techniques. DSD 2002: 252-258
10	EE	José M. Mendías, Román Hermida, María C. Molina, Olga Peñalba: Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis. DSD 2002: 308-315
9	EE	Olga Peñalba, José M. Mendías, Román Hermida: Source Code Transformation to Improve Conditional Hardware Reuse. DSD 2002: 324-331
8	EE	María C. Molina, José M. Mendías, Román Hermida: Bit-Level Allocation of Multiple-Precision Specifications. DSD 2002: 385-392
7	EE	Aitor Ibarra, Juan Lanchares, Jose Manuel Mendias, José Ignacio Hidalgo, Román Hermida: Transformation of Equational Specification by Means of Genetic Programming. EuroGP 2002: 248-257
6	EE	María C. Molina, José M. Mendías, Román Hermida: Bit-level scheduling of heterogeneous behavioural specifications. ICCAD 2002: 602-608
5	EE	José M. Mendías, Román Hermida, Olga Peñalba: A study about the efficiency of formal high-level synthesis applied to verification. Integration 31(2): 101-131 (2002)
2000
4	EE	Olga Peñalba, José M. Mendías, María C. Molina: Execution Condition Analysis in High Level Synthesis: A Unified Approach. ISSS 2000: 73-78
1999
3	EE	Olga Peñalba, José M. Mendías, Román Hermida: A Unified Algorithm for Mutual Exclusiveness Identification. EUROMICRO 1999: 1504-1510
1998
2	EE	José M. Mendías, Román Hermida: Correct High-Level Synthesis: a Formal Perspective. DATE 1998: 977-978
1997
1	EE	José M. Mendías, Román Hermida, Milagros Fernández: Formal Techniques for Hardware Allocation. VLSI Design 1997: 161-165

Coauthor Index

1	Andrea Acquaviva	[49]
2	David Atienza	[17] [19] [20] [21] [22] [24] [25] [27] [28] [29] [30] [31] [32] [34] [37] [39] [40] [41] [43] [46] [49]
3	Christos Baloukas	[29]
4	Alexandros Bartzas	[47] [50]
5	Luca Benini	[28] [32] [37] [40] [43] [46] [49]
6	Salvatore Carta	[49]
7	Francky Catthoor	[17] [19] [20] [21] [22] [24] [25] [27] [28] [29] [30] [32] [34] [37] [39] [41] [47] [50]
8	Edgar G. Daylight	[19]
9	Geert Deconinck	[17] [24]
10	Milagros Fernández	[1]
11	Javier Garcia Flores	[40]
12	Vincenzo De Florio	[17] [24]
13	Nicolas Genko	[32] [34]
14	Román Hermida	[1] [2] [3] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [18] [23] [26] [31] [32] [33] [34] [35] [36] [38] [42] [45] [46] [48]
15	José Ignacio Hidalgo	[7] [11]
16	Aitor Ibarra	[7] [11]
17	Juan Lanchares	[7] [11]
18	Rudy Lauwereins	[17] [24]
19	Marc Leeman	[17] [24]
20	Ivan Magan	[31] [40]
21	Stylianos Mamagkakis (Stelios Mamagkakis)	[20] [21] [25] [27] [29] [37] [39] [41] [47] [50]
22	Paul Marchal	[28]
23	Giovanni De Micheli	[32] [34] [40] [43] [46] [49]
24	María C. Molina	[4] [6] [8] [10] [12] [14] [15] [16] [18] [23] [26] [33] [35] [36] [38] [42] [44] [45] [48]
25	Alexandros Mpartzas	[20]
26	Katzalin Olcoz	[22] [30]
27	Giacomo Paci	[43] [46]
28	Olga Peñalba	[3] [4] [5] [9] [10] [13]
29	M. Peón	[31]
30	Miguel Peon-Quiros	[47] [50]
31	Esther Andres Perez	[40]
32	J. B. Pérez-Ramas	[31]
33	Francesco Poletti	[28] [37] [43] [46]
34	Christophe Poucet	[41]
35	Georgios Pouiklis	[20]
36	Fernando Rincón	[49]
37	Rafael Ruiz-Sautua	[16] [23] [26] [33] [35] [36] [38] [42] [44] [45] [48]
38	Dimitrios Soudris (D. J. Soudris)	[20] [21] [25] [27] [29] [37] [39] [41] [47] [50]
39	Adonios Thanailakis (Antonios Thanailakis)	[20] [29]
40	Francisco Tirado	[22] [30]
41	Pablo Garcia Del Valle	[40] [43] [46] [49]
42	Arnout Vandecappelle	[19]
43	José Manuel Velasco	[22] [30]