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| 2006 | ||
|---|---|---|
| 8 | EE | Haakon Dybdahl, Marius Grannæs, Lasse Natvig: Cache Write-Back Schemes for Embedded Destructive-Read DRAM. ARCS 2006: 145-159 |
| 7 | EE | Cyril Banino-Rokkones, Olivier Beaumont, Lasse Natvig: Master-Slave Tasking on Asymmetric Networks. Euro-Par 2006: 167-176 |
| 6 | EE | Haakon Dybdahl, Per Stenström, Lasse Natvig: A Cache-Partitioning Aware Replacement Policy for Chip Multiprocessors. HiPC 2006: 22-34 |
| 2004 | ||
| 5 | EE | Lasse Natvig, Steinar Line: Age of computers: game-based teaching of computer fundamentals. ITiCSE 2004: 107-111 |
| 2001 | ||
| 4 | EE | Lasse Natvig: Simulating Parallel Architectures with BSPlab. HPCN Europe 2001: 547-550 |
| 3 | EE | Tormod Njølstad, Lasse Natvig: Experience from a 450 Students/Year Course on Digital Logic and Computer Fundamentals using FPGAs and mu-Controllers. MSE 2001: 18-19 |
| 1994 | ||
| 2 | Lasse Natvig: Compile and Runtime Padding: An Approach to Realising Synchronous MIMD Execution. IFIP Congress (1) 1994: 553-558 | |
| 1990 | ||
| 1 | EE | Lasse Natvig: Logarithmic time cost optimal parallel sorting is not yet fast in practice!. SC 1990: 486-494 |
| 1 | Cyril Banino-Rokkones (Cyril Banino) | [7] |
| 2 | Olivier Beaumont | [7] |
| 3 | Haakon Dybdahl | [6] [8] |
| 4 | Marius Grannæs | [8] |
| 5 | Steinar Line | [5] |
| 6 | Tormod Njølstad | [3] |
| 7 | Per Stenström | [6] |