| |
| 2008 | ||
|---|---|---|
| 3 | EE | Yu Pu, Jose de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha: Statistical noise margin estimation for sub-threshold combinational circuits. ASP-DAC 2008: 176-179 |
| 2007 | ||
| 2 | EE | Yu Pu, Jose de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha: Vt balancing and device sizing towards high yield of sub-threshold static logic gates. ISLPED 2007: 355-358 |
| 2006 | ||
| 1 | EE | Yu Pu, Yajun Ha: An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model. ASP-DAC 2006: 886-891 |
| 1 | Henk Corporaal | [2] [3] |
| 2 | Jose de Jesus Pineda de Gyvez | [2] [3] |
| 3 | Yajun Ha | [1] [2] [3] |