| |
| 2002 | ||
|---|---|---|
| 3 | EE | Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri: Improvement of ASIC Design Processes. ASP-DAC 2002: 105-112 |
| 2 | EE | Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri: Improvement of ASIC Design Processes. VLSI Design 2002: 105- |
| 2001 | ||
| 1 | EE | Vineet Sahula, C. P. Ravikumar: The Hierarchical Concurrent Flow Graph Approach for Modeling and Analysis of Design Processes. VLSI Design 2001: 91-96 |
| 1 | D. Nagchoudhuri | [2] [3] |
| 2 | C. P. Ravikumar | [1] [2] [3] |