Fabio Salice

2007
53		Cristiana Bolchini, Fabio Salice, Marco D. Santambrogio: Exploring Partial Reconfiguration for Mitigating SEU faults in SRAM-Based FPGAs. ERSA 2007: 199-202
52	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto, Luigi Pomante: Reliable System Specification for Self-Checking Data-Paths CoRR abs/0710.4685: (2007)
2006
51	EE	Carlo Brandolese, William Fornaciari, Luigi Pomante, Fabio Salice, Donatella Sciuto: Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC. IEEE Trans. Computers 55(5): 508-519 (2006)
50	EE	Cristiana Bolchini, Paolo Ferrandi, Pier Luca Lanzi, Fabio Salice: Evolving classifiers on field programmable gate arrays: Migrating XCS to FPGAs. Journal of Systems Architecture 52(8-9): 516-533 (2006)
2005
49	EE	Cristiana Bolchini, Paolo Ferrandi, Pier Luca Lanzi, Fabio Salice: Toward an FPGA implementation of XCS. Congress on Evolutionary Computation 2005: 2053-2060
48	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto, Luigi Pomante: Reliable System Specification for Self-Checking Data-Paths. DATE 2005: 1278-1283
47	EE	Cristiana Bolchini, Antonio Miele, Fabio Salice, Donatella Sciuto: A model of soft error effects in generic IP processors. DFT 2005: 334-342
2004
46	EE	Carlo Brandolese, William Fornaciari, Fabio Salice: An area estimation methodology for FPGA based designs at systemc-level. DAC 2004: 129-132
45	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Analysis and Modeling of Energy Reducing Source Code Transformations. DATE 2004: 306-311
44	EE	Cristiana Bolchini, Antonio Miele, Fabio Salice, Donatella Sciuto, Luigi Pomante: Reliable System Co-Design: The FIR Case Study. DFT 2004: 433-441
43	EE	Carlo Brandolese, William Fornaciari, Fabio Salice: Discrete-Event Modeling and Simulation of Superscalar Microprocessor Architectures. PATMOS 2004: 238-247
2003
42	EE	William Fornaciari, Fabio Salice, Daniele Paolo Scarpazza: Early estimation of the size of VHDL projects. CODES+ISSS 2003: 207-212
41	EE	William Fornaciari, P. Micheli, Fabio Salice, L. Zampella: A First Step Towards Hw/Sw Partitioning of UML Specifications. DATE 2003: 10668-10673
40	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Library Functions Timing Characterization for Source-Level Analysis. DATE 2003: 11132-11133
39	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto, R. Zavaglia: An Integrated Design Approach for Self-Checking FPGAs. DFT 2003: 443-450
38		Fabio Salice, William Fornaciari, Luca Del Vecchio, Luigi Pomante: Partitioning of Embedded Applications onto Heterogeneous Multiprocessor Architectures. SAC 2003: 661-665
37	EE	Cristiana Bolchini, Fabio Salice, Fabio A. Schreiber, Letizia Tanca: Logical and physical design issues for smart card databases. ACM Trans. Inf. Syst. 21(3): 254-285 (2003)
2002
36	EE	Donatella Sciuto, Fabio Salice, Luigi Pomante, William Fornaciari: Metrics for design space exploration of heterogeneous multiprocessor embedded systems. CODES 2002: 55-60
35	EE	Fabio Salice, Mariagiovanna Sami, Renato Stefanelli: Fault-Tolerant CAM Architectures: A Design Framework. DFT 2002: 233-244
34	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto: Designing Self-Checking FPGAs through Error Detection Codes. DFT 2002: 60-68
33	EE	Cristiana Bolchini, Luigi Pomante, Fabio Salice, Donatella Sciuto: A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems. IOLTW 2002: 32-
32	EE	William Fornaciari, Vito Trianni, Carlo Brandolese, Donatella Sciuto, Fabio Salice, Giovanni Beltrame: Modeling Assembly Instruction Timing in Superscalar Architectures. ISSS 2002: 132-137
31		Cristiana Bolchini, Fabio Salice, Fabio A. Schreiber, Letizia Tanca: Physical and Logical Data Structures for Very Small Databases. SEBD 2002: 337-344
30	EE	Carlo Brandolese, Fabio Salice, William Fornaciari, Donatella Sciuto: Static power modeling of 32-bit microprocessors. IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1306-1316 (2002)
29	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: The Impact of Source Code Transformations on Software Power and Energy Consumption. Journal of Circuits, Systems, and Computers 11(5): 477-502 (2002)
2001
28	EE	William Fornaciari, Fabio Salice, Umberto Bondi, Edi Magini: Development cost and size estimation starting from high-level specifications. CODES 2001: 86-91
27	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Source-level execution time estimation of C programs. CODES 2001: 98-103
26	EE	Cristiana Bolchini, Fabio Salice: A Software Methodology for Detecting Hardware Faults in VLIW Data Paths. DFT 2001: 170-175
25	EE	Giovanni Beltrame, Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto, Vito Trianni: An Assembly-Level Execution-Time Model for Pipelined Architectures. ICCAD 2001: 195-200
24	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto: Designing Reliable Embedded Systems Based on 32 Bit Microprocessors. IOLTW 2001: 137
23	EE	Cristiana Bolchini, Luigi Pomante, Fabio Salice, Donatella Sciuto: Reliability Properties Assessment at System Level: A Co-design Framework. IOLTW 2001: 165-171
22		Giovanni Beltrame, Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto, Vito Trianni: Dynamic modeling of inter-instruction effects for execution time estimation. ISSS 2001: 136-141
21		Cristiana Bolchini, Luigi Pomante, Fabio Salice, Donatella Sciuto: On-line fault detection in a hardware/software co-design environment. ISSS 2001: 51-56
2000
20	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Energy estimation for 32-bit microprocessors. CODES 2000: 24-28
19	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: An instruction-level functionally-based energy estimation model for 32-bits microprocessors. DAC 2000: 346-351
18	EE	Carlo Brandolese, William Fornaciari, Luigi Pomante, Fabio Salice, Donatella Sciuto: A Multi-Level Strategy for Software Power Estimation. ISSS 2000: 187-192
17	EE	Alberto Allara, Massimo Bombana, William Fornaciari, Fabio Salice: A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller. IEEE Design & Test of Computers 17(2): 60-72 (2000)
16	EE	Cristiana Bolchini, R. Montandon, Fabio Salice, Donatella Sciuto: Design of VHDL-based totally self-checking finite-state machine and data-path descriptions. IEEE Trans. VLSI Syst. 8(1): 98-103 (2000)
1999
15	EE	Cristiana Bolchini, Luigi Pomante, Donatella Sciuto, Fabio Salice: A Synthesis Methodology Aimed at Improving the Quality of TSC Devices. DFT 1999: 247-255
1998
14	EE	Alberto Allara, William Fornaciari, Fabio Salice, Donatella Sciuto: A Model for System-Level Timed Analysis and Profiling. DATE 1998: 204-210
13	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto: Fault Analysis in Networks with Concurrent Error Detection Properties. DATE 1998: 957-958
12	EE	Cristiana Bolchini, William Fornaciari, Fabio Salice, Donatella Sciuto: Concurrent Error Detection at Architectural Level. ISSS 1998: 72-75
11	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto: Fault Analysis for Networks with Concurrent Error Detection. IEEE Design & Test of Computers 15(4): 66-74 (1998)
1997
10	EE	Alberto Allara, S. Filipponi, Fabio Salice, William Fornaciari, Donatella Sciuto: A Flexible Model for Evaluating the Behavior of Hardware/Software Systems. CODES 1997: 109-114
9	EE	Cristiana Bolchini, Donatella Sciuto, Fabio Salice: Designing Networks with Error Detection Properties through the Fault-Error Relation. DFT 1997: 290-297
8	EE	Cristiana Bolchini, Fabio Salice, Donatella Sciuto: Parity Bit Code: Achieving a Complete Fault Coverage in the Design of TSC Combinational Networks. Great Lakes Symposium on VLSI 1997: 32-
7		Alberto Allara, S. Filipponi, William Fornaciari, Fabio Salice, Donatella Sciuto: Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation. ICCD 1997: 400-405
6		Cristiana Bolchini, Donatella Sciuto, Fabio Salice: A TSC Evaluation Function for Combinational Circuits. ICCD 1997: 555-560
1995
5		Giacomo Buonanno, Fabio Salice, Donatella Sciuto: Behavior of Self-Checking Checkers for 1-out-of-3 Codes Based on Pass-Transistor Logic. ISCAS 1995: 1924-1927
4		Cristiana Bolchini, Franco Fummi, R. Gemelli, Fabio Salice: A BDD Based Algorithm for Detecting Difficult Faults. ISCAS 1995: 2015-2018
3	EE	William Fornaciari, Fabio Salice: A new architecture for the automatic design of custom digital neural network. IEEE Trans. VLSI Syst. 3(4): 502-506 (1995)
1994
2		Fabio Salice, Mariagiovanna Sami, Donatella Sciuto: Synthesis of Multi-level Self-Checking Logic. DFT 1994: 115-123
1993
1		A. Dell'Acqua, M. Hansen, S. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, A. Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, S. Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson: System Level Policies for Fault Tolerance Issues in the FERMI Project. DFT 1993: 1-8

Coauthor Index

1	Cesare Alippi	[1]
2	Alberto Allara	[7] [10] [14] [17]
3	Goran Appelquist	[1]
4	Giovanni Beltrame	[22] [25] [32]
5	S. Berglund	[1]
6	C. Bohm	[1]
7	Cristiana Bolchini	[4] [6] [8] [9] [11] [12] [13] [15] [16] [21] [23] [24] [26] [31] [33] [34] [37] [39] [44] [47] [48] [49] [50] [52] [53]
8	Massimo Bombana	[17]
9	Umberto Bondi	[28]
10	Carlo Brandolese	[18] [19] [20] [22] [25] [27] [29] [30] [32] [40] [43] [45] [46] [51]
11	Luca Breveglieri	[1]
12	S. Brigati	[1]
13	Giacomo Buonanno	[5]
14	L. Del Buono	[1]
15	P. Carlson	[1]
16	P. Cattaneo	[1]
17	Luigi Dadda	[1]
18	J. David	[1]
19	A. Dell'Acqua	[1]
20	Magnus Engström	[1]
21	Paolo Ferrandi	[49] [50]
22	S. Filipponi	[7] [10]
23	William Fornaciari	[3] [7] [10] [12] [14] [17] [18] [19] [20] [22] [25] [27] [28] [29] [30] [32] [36] [38] [40] [41] [42] [43] [45] [46] [51]
24	G. Fumagalli	[1]
25	Franco Fummi	[4]
26	Umberto Gatti	[1]
27	R. Gemelli	[4]
28	J. F. Genat	[1]
29	G. Goggi	[1]
30	M. Hansen	[1]
31	H. Hentzell	[1]
32	I. Höglund	[1]
33	S. Inkinen	[1]
34	A. Kerek	[1]
35	Pier Luca Lanzi	[49] [50]
36	O. LeDortz	[1]
37	H. Lebbolo	[1]
38	B. Lofstedt	[1]
39	Edi Magini	[28]
40	Franco Maloberti	[1]
41	P. Micheli	[41]
42	Antonio Miele	[44] [47]
43	R. Montandon	[16]
44	P. Nayman	[1]
45	S. T. Persson	[1]
46	Vincenzo Piuri	[1]
47	Luigi Pomante	[15] [18] [21] [23] [33] [36] [38] [44] [48] [51] [52]
48	Mariagiovanna Sami	[1] [2] [35]
49	Marco D. Santambrogio	[53]
50	A. Savoy-Navarro	[1]
51	Daniele Paolo Scarpazza	[42]
52	Fabio A. Schreiber	[31] [37]
53	Donatella Sciuto	[2] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [18] [19] [20] [21] [22] [23] [24] [25] [27] [29] [30] [32] [33] [34] [36] [39] [40] [44] [45] [47] [48] [51] [52]
54	Renato Stefanelli	[1] [35]
55	Rolf Sundblad	[1]
56	Christer Svensson	[1]
57	Letizia Tanca	[31] [37]
58	Guido Torelli	[1]
59	Vito Trianni	[22] [25] [32]
60	J. P. Vanuxem	[1]
61	Luca Del Vecchio	[38]
62	N. Yamdagni	[1]
63	Jiren Yuan	[1]
64	L. Zampella	[41]
65	R. Zavaglia	[39]
66	R. Zitoun	[1]