Christer Svensson

2006
27	EE	Peter Caputa, Christer Svensson: A 3Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency. VLSI Design 2006: 117-122
2004
26	EE	Christer Svensson: Synchronous Latency Insensitive Design. ASYNC 2004: 3
25		Håkan Bengtson, Christer Svensson: 2 GB/S decision feedback equalizer in 3.3 V 0.35 µM CMOS. Circuits, Signals, and Systems 2004: 114-119
24	EE	Anders Edman, Christer Svensson: Timing closure through a globally synchronous, timing partitioned design methodology. DAC 2004: 71-74
23		Behzad Mesgarzadeh, Christer Svensson, Atila Alvandpour: A new mesochronous clocking scheme for synchronization in SoC. ISCAS (2) 2004: 605-608
22	EE	Peter Caputa, Henrik Fredriksson, Martin Hansson, Stefan Andersson, Atila Alvandpour, Christer Svensson: An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies. PATMOS 2004: 849-858
2003
21	EE	Darius Jakonis, Christer Svensson: A 1.6 GHz downconversion sampling mixer in CMOS. ISCAS (1) 2003: 725-728
2002
20	EE	Stefan Rusu, Manoj Sachdev, Christer Svensson, B. Nauta: T3: Trends and Challenges in VLSI Technology Scaling towards 100nm. ASP-DAC 2002: 16-17
19	EE	Darius Jakonis, Christer Svensson: A 1 GHz linearized CMOS track-and-hold circuit. ISCAS (5) 2002: 577-580
18	EE	Stefan Rusu, Manoj Sachdev, Christer Svensson, B. Nauta: Trends and Challenges in VLSI Technology Scaling towards 100nm (Tutorial Abstract). VLSI Design 2002: 16-17
2001
17	EE	Håkan Bengtson, Christer Svensson: 3V CMOS 0.35 µ transimpedance receiver for optical applications. ISCAS (4) 2001: 69-71
2000
16	EE	Mattias Duppils, Christer Svensson: Low power mixed analog-digital signal processing. ISLPED 2000: 61-66
1999
15	EE	Fenghao Mu, Christer Svensson: High speed interface for system-on-chip design by self-tested self-synchronization. ISCAS (2) 1999: 516-519
14	EE	Fenghao Mu, Christer Svensson: High speed multistage CMOS clock buffers with pulse width control loop. ISCAS (2) 1999: 541-544
13	EE	Fenghao Mu, Christer Svensson: Methodology of layout based schematic and its usage in efficient high performance CMOS design. ISCAS (6) 1999: 254-257
12	EE	Fenghao Mu, Christer Svensson: Vector Transfer by Self-Tested Self-Synchronization for Parallel Systems. IEEE Trans. Parallel Distrib. Syst. 10(8): 769-780 (1999)
1998
11	EE	Fenghao Mu, Christer Svensson: Efficient High-Speed CMOS Design by Layout Based Schematic Method. EUROMICRO 1998: 10337-10340
10	EE	Fenghao Mu, Christer Svensson: Self-Synchronized Vector Transfer for High Speed Parallel Systems. ICPADS 1998: 2-9
9	EE	Atila Alvandpour, Per Larsson-Edefors, Christer Svensson: Separation and extraction of short-circuit power consumption in digital CMOS VLSI circuits. ISLPED 1998: 245-249
8	EE	Christer Svensson, Atila Alvandpour: Low power and low voltage CMOS digital circuit techniques. ISLPED 1998: 7-10
1994
7		Jacob Midtgaard, Christer Svensson: 5.8Gb/s 16: 1 Multiplexer and 1: 16 Demultiplexer Using 1.2µm BiCMOS. ISCAS 1994: 43-46
1993
6		A. Dell'Acqua, M. Hansen, S. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, A. Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, S. Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson: System Level Policies for Fault Tolerance Issues in the FERMI Project. DFT 1993: 1-8
5		Christer Jansson, Christer Svensson: A sensor array for phase and amplitude detection of synchronous modulated light sources. ISCAS 1993: 164-167
4		Christer Svensson, Jiren Yuan: Ultra high speed CMOS design. VLSI 1993: 273-282
1992
3		Morteza Afghahi, Christer Svensson: Performance of Synchronous and Asynchronous Schemes for VLSI Systems. IEEE Trans. Computers 41(7): 858-872 (1992)
1988
2	EE	Christer Svensson, Robert Tjarnstrom: Switch-level simulation and the pass transistor EXOR gate. IEEE Trans. on CAD of Integrated Circuits and Systems 7(9): 994-997 (1988)
1987
1	EE	Rolf Sundblad, Christer Svensson: Fully Dynamic Switch-Level Simulation of CMOS Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 6(2): 282-289 (1987)

Coauthor Index

1	Morteza Afghahi	[3]
2	Cesare Alippi	[6]
3	Atila Alvandpour	[8] [9] [22] [23]
4	Stefan Andersson	[22]
5	Goran Appelquist	[6]
6	Håkan Bengtson	[17] [25]
7	S. Berglund	[6]
8	C. Bohm	[6]
9	Luca Breveglieri	[6]
10	S. Brigati	[6]
11	L. Del Buono	[6]
12	Peter Caputa	[22] [27]
13	P. Carlson	[6]
14	P. Cattaneo	[6]
15	Luigi Dadda	[6]
16	J. David	[6]
17	A. Dell'Acqua	[6]
18	Mattias Duppils	[16]
19	Anders Edman	[24]
20	Magnus Engström	[6]
21	Henrik Fredriksson	[22]
22	G. Fumagalli	[6]
23	Umberto Gatti	[6]
24	J. F. Genat	[6]
25	G. Goggi	[6]
26	M. Hansen	[6]
27	Martin Hansson	[22]
28	H. Hentzell	[6]
29	I. Höglund	[6]
30	S. Inkinen	[6]
31	Darius Jakonis	[19] [21]
32	Christer Jansson	[5]
33	A. Kerek	[6]
34	Per Larsson-Edefors	[9]
35	O. LeDortz	[6]
36	H. Lebbolo	[6]
37	B. Lofstedt	[6]
38	Franco Maloberti	[6]
39	Behzad Mesgarzadeh	[23]
40	Jacob Midtgaard	[7]
41	Fenghao Mu	[10] [11] [12] [13] [14] [15]
42	B. Nauta	[18] [20]
43	P. Nayman	[6]
44	S. T. Persson	[6]
45	Vincenzo Piuri	[6]
46	Stefan Rusu	[18] [20]
47	Manoj Sachdev	[18] [20]
48	Fabio Salice	[6]
49	Mariagiovanna Sami	[6]
50	A. Savoy-Navarro	[6]
51	Renato Stefanelli	[6]
52	Rolf Sundblad	[1] [6]
53	Robert Tjarnstrom	[2]
54	Guido Torelli	[6]
55	J. P. Vanuxem	[6]
56	N. Yamdagni	[6]
57	Jiren Yuan	[4] [6]
58	R. Zitoun	[6]

Colors in the list of coauthors