dblp.uni-trier.dewww.uni-trier.de

Serdar Tasiran

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2007
25 Oleg Sokolsky, Serdar Tasiran: Runtime Verification, 7th International Workshop, RV 2007, Vancover, Canada, March 13, 2007, Revised Selected Papers Springer 2007
24EETayfun Elmas, Shaz Qadeer, Serdar Tasiran: Goldilocks: a race and transaction-aware java runtime. PLDI 2007: 245-255
23EESerdar Tasiran, Tayfun Elmas: Rollback Atomicity. RV 2007: 188-201
2006
22EETayfun Elmas, Shaz Qadeer, Serdar Tasiran: Goldilocks: Efficiently Computing the Happens-Before Relation Using Locksets. FATES/RV 2006: 193-208
21EETayfun Elmas, Serdar Tasiran: VyrdMC: Driving Runtime Refinement Checking with Model Checkers. Electr. Notes Theor. Comput. Sci. 144(4): 41-56 (2006)
2005
20EESoner Yaldiz, Alper Demir, Serdar Tasiran, Paolo Ienne, Yusuf Leblebici: Characterizing and Exploiting Task-Load Variability and Correlation for Energy Management in multi-core systems. ESTImedia 2005: 135-140
19EESerdar Tasiran, Tayfun Elmas, Guven Bolukbasi, M. Erkan Keremoglu: A Novel Test Coverage Metric for Concurrently-Accessed Software Components. FATES 2005: 62-71
18EETayfun Elmas, Serdar Tasiran, Shaz Qadeer: VYRD: verifYing concurrent programs by runtime refinement-violation detection. PLDI 2005: 27-37
17EESerdar Tasiran, Shaz Qadeer: Runtime Refinement Checking of Concurrent Data Structures. Electr. Notes Theor. Comput. Sci. 113: 163-179 (2005)
2004
16EESerdar Tasiran, Yuan Yu, Brannon Batson: Linking Simulation with Formal Verification at a Higher Level. IEEE Design & Test of Computers 21(6): 472-482 (2004)
2003
15EESerdar Tasiran, Yuan Yu, Brannon Batson: Using a formal specification and a model checker to monitor and direct simulation. DAC 2003: 356-361
14EETamara Munzner, François Guimbretière, Serdar Tasiran, Li Zhang, Yunhong Zhou: TreeJuxtaposer: scalable tree comparison using Focus+Context with guaranteed visibility. ACM Trans. Graph. 22(3): 453-462 (2003)
13EERajeev Joshi, Leslie Lamport, John Matthews, Serdar Tasiran, Mark R. Tuttle, Yuan Yu: Checking Cache-Coherence Protocols with TLA+. Formal Methods in System Design 22(2): 125-131 (2003)
2002
12EEShaz Qadeer, Serdar Tasiran: Promising Directions in Hardware Design Verification (invited). ISQED 2002: 381-387
11EEThomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani, Serdar Tasiran: An assume-guarantee rule for checking simulation. ACM Trans. Program. Lang. Syst. 24(1): 51-64 (2002)
2001
10 Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer: A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage. ICCD 2001: 82-88
9EESerdar Tasiran, Kurt Keutzer: Coverage Metrics for Functional Validation of Hardware Designs. IEEE Design & Test of Computers 18(4): 36-45 (2001)
1999
8EEEllen Sentovich, David L. Dill, Serdar Tasiran: Formal verification meets simulation (tutorial abstract). ICCAD 1999: 221
1998
7 Rajeev Alur, Thomas A. Henzinger, Freddy Y. C. Mang, Shaz Qadeer, Sriram K. Rajamani, Serdar Tasiran: MOCHA: Modularity in Model Checking. CAV 1998: 521-525
6EEThomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani, Serdar Tasiran: An Assume-Guarantee Rule for Checking Simulation. FMCAD 1998: 421-432
1997
5 Serdar Tasiran, Robert K. Brayton: STARI: A Case Study in Compositional and Hierarchical Timing Verification. CAV 1997: 191-201
1996
4 Serdar Tasiran, Rajeev Alur, Robert P. Kurshan, Robert K. Brayton: Verifying Abstractions of Timed Systems. CONCUR 1996: 546-562
1995
3 Serdar Tasiran, Ramin Hojati, Robert K. Brayton: Language containment of non-deterministic omega-automata. CHARME 1995: 261-277
1994
2EEAdnan Aziz, Serdar Tasiran, Robert K. Brayton: BDD Variable Ordering for Interacting Finite State Machines. DAC 1994: 283-288
1EEAdnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: HSIS: A BDD-Based Environment for Formal Verification. DAC 1994: 454-459

Coauthor Index

1Rajeev Alur [4] [7]
2Adnan Aziz [1] [2]
3Felice Balarin [1]
4Brannon Batson [15] [16]
5Guven Bolukbasi [19]
6Robert K. Brayton [1] [2] [3] [4] [5]
7Szu-Tsung Cheng [1]
8David G. Chinnery [10]
9Alper Demir [20]
10David L. Dill [8]
11Tayfun Elmas [18] [19] [21] [22] [23] [24]
12Farzan Fallah [10]
13François Guimbretière [14]
14Thomas A. Henzinger [6] [7] [11]
15Ramin Hojati [1] [3]
16Paolo Ienne [20]
17Rajeev Joshi [13]
18Timothy Kam [1]
19M. Erkan Keremoglu [19]
20Kurt Keutzer [9] [10]
21Sriram C. Krishnan [1]
22Robert P. Kurshan [4]
23Leslie Lamport [13]
24Yusuf Leblebici [20]
25Freddy Y. C. Mang [7]
26John Matthews [13]
27Tamara Munzner [14]
28Shaz Qadeer [6] [7] [11] [12] [17] [18] [22] [24]
29Sriram K. Rajamani [6] [7] [11]
30Rajeev K. Ranjan [1]
31Alberto L. Sangiovanni-Vincentelli [1]
32Ellen Sentovich (Ellen M. Sentovich) [8]
33Thomas R. Shiple [1]
34Vigyan Singhal [1]
35Oleg Sokolsky [25]
36Mark R. Tuttle [13]
37Huey-Yih Wang [1]
38Scott J. Weber [10]
39Soner Yaldiz [20]
40Yuan Yu [13] [15] [16]
41Li Zhang [14]
42Yunhong Zhou [14]

Copyright © Wed May 28 02:56:03 2008 by Michael Ley (ley@uni-trier.de)